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參數(shù)資料
| 型號： | ISL6219CA |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | DB50 FEMALE SOLDER SHELL |
| 中文描述： | SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 9/17頁 |
| 文件大小： | 476K |
| 代理商： | ISL6219CA |
9
have more difficulty cooling with comparatively less air flow
and heat sinking. The hotter channels may also be located
close to other heat-generating components tending to drive
their temperature even higher. In these cases, a proper
selection of the current sense resistors (R
ISEN
in Figure 4)
introduces channel current unbalance into the system.
Increasing the value of R
ISEN
in the cooler channels and
decreasing it in the hotter channels moves all channels into
thermal balance at the expense of current balance.
OVERCURRENT PROTECTION
The average current, I
AVG
in Figure 5, is continually
compared with a constant 75
μ
A reference current. If the
average current at any time exceeds the reference current,
the comparator triggers the converter to shut down. All PWM
signals are placed in a high-impedance state which signals
the drivers to turn off both upper and lower MOSFETs. The
system remains in this state while the controller counts 2048
phase-clock cycles.
This is followed by a soft-start attempt (see
Soft-Start
). If the
soft-start attempt is successful, operation will continue as
normal. Should the soft-start attempt fail, the ISL6219
repeats the 2048-cycle wait period and follows with another
soft-start attempt. This hiccup mode of operation continues
indefinitely as shown in Figure 6 as long as the controller is
enabled or until the overcurrent condition resolves.
VOLTAGE REGULATION
The ISL6219 uses a digital to analog converter (DAC) to gen-
erate a reference voltage based on the logic signals at pins
VID4 to VID0. The DAC decodes the a 5-bit logic signal (VID)
into one of the discrete voltages shown in Table 1. Each VID
input offers a 20
μ
A pull up to 2.5V for use with open-drain out-
puts. External pull-up resistors or active-high output stages
can augment the pull-up current sources, but a slight accu-
racy error can occur if they are pulled above 2.9V.
The integrating compensation network shown in Figure 7
assures that the steady-state error in the output voltage is
limited to the error in the reference voltage (output of the
DAC).
FIGURE 5. CHANNEL-1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
÷
N
I
AVG
I
3
I
2
Σ
-
+
+
-
+
-
f(j
ω
)
PWM1
I
1
V
COMP
SAWTOOTH SIGNAL
I
ER
TABLE 1. VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0
VDAC
1
1
1
1
1
Off
1
1
1
1
0
1.100
1
1
1
0
1
1.125
1
1
1
0
0
1.150
1
1
0
1
1
1.175
1
1
0
1
0
1.200
1
1
0
0
1
1.225
1
1
0
0
0
1.250
1
0
1
1
1
1.275
1
0
1
1
0
1.300
1
0
1
0
1
1.325
1
0
1
0
0
1.350
1
0
0
1
1
1.375
0A
0V
5ms/DIV
OUTPUT VOLTAGE,
500mV/DIV
OUTPUT CURRENT, 20A/DIV
FIGURE 6. OVERCURRENT BEHAVIOR IN HICCUP MODE
FIGURE 7. OUTPUT-VOLTAGE AND LOAD-LINE
REGULATION
-
+
I
AVG
REFERENCE
VOLTAGE(V
DAC
)
EXTERNAL CIRCUIT
ISL6219 INTERNAL CIRCUIT
COMP
C
C
R
C
R
FB
FB
VSEN
-
+
V
DROOP
ERROR AMPLIFIER
V
OUT
V
COMP
ISL6219
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相關(guān)代理商/技術(shù)參數(shù) |
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| ISL6223CA-T | 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述: |
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