7 FN6739.2 September 5, 2012 CMRR Common-mode Rejection Ratio at f
參數(shù)資料
型號: ISL59605-SPI-EVALZ
廠商: Intersil
文件頁數(shù): 26/28頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR ISL5960X
產(chǎn)品培訓(xùn)模塊: ISL5960x MegaQ Overview
標(biāo)準(zhǔn)包裝: 1
系列: *
ISL59601, ISL59602, ISL59603, ISL59604, ISL59605
7
FN6739.2
September 5, 2012
CMRR
Common-mode Rejection Ratio at
fIN = 100kHz
0 feet cable
-50
dB
2,500 feet cable
-35
dB
IClamp
Input Clamp Current
25
A
OUTPUT CHARACTERISTICS
AGC-ACC
AGC Accuracy
Accuracy of sync tip amplitude
relative to 600mV
±0.5
dB
IOUT
Output Drive Current
40
mA
tEN-EQ
Enable-to-Equalization On Time
500
ns
tDIS-EQ
Disable-to-Equalization Off Time
500
ns
LOGIC CONTROL PINS
VIH
Logic High Level
2.0
V
VIL
Logic Low Level
0.8
V
ILOGIC
Logic Input Current
EQ_DISABLE, FREEZE, SD, SCK,
SEN
±10
A
INVERT, COLOR
±500
A
Electrical Specifications VDD = VDD1 = VDD2 = +5V, source video amplitude before any cable loss = 1VP-P, cable type = Cat 5,
cable length = 0 feet, RL = 150Ω (75Ω series + 75Ω load to ground), TA = +25°C, exposed die plate = 0V, unless otherwise specified.
Max cable length = 1000 feet for ISL59601, 2000 feet for ISL59602, 3000 feet for ISL59603, 4000 feet for ISL59604, and 5300 feet for
ISL59605. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
Serial Timing
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
tCS
Serial Enable Deselect Time
10
ns
tLEAD
Lead Time
10
ns
tSU
SD, SCK Setup Time
10
ns
tH
SD, SEN, SCK Hold Time
10
ns
tWH
SCK High Time
100
ns
tWL
SCK Low Time
100
ns
tRI
SD, SEN, SCK Rise Time
10
ns
tFI
SD, SEN, SCK Fall Time
10
ns
tLAG
Lag Time
10
ns
tV
SCK Rising Edge to SD Data Valid
Read Operation
10
ns
fSCK
SCK Frequency
5MHz
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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