21 FN6739.2 September 5, 2012 Application Information Unshielded Twisted Pair (UTP) App Circui" />
參數資料
型號: ISL59605-SPI-EVALZ
廠商: Intersil
文件頁數: 14/28頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR ISL5960X
產品培訓模塊: ISL5960x MegaQ Overview
標準包裝: 1
系列: *
ISL59601, ISL59602, ISL59603, ISL59604, ISL59605
21
FN6739.2
September 5, 2012
Application Information
Unshielded Twisted Pair (UTP) App Circuit
Figure 45 shows the complete schematic for a MegaQ
equalizer configured for unshielded twisted pair (UTP) cable. The
input signal is terminated into the network formed by R1, R2,
and R3. C1 and C2 AC-couple the signal into MegaQ. To protect
the front-end circuitry, 5V transorbs (Z1 and Z2) should be used
instead of diodes because the signals on either differential input
may swing far enough below ground to turn on a diode and
distort the video.
On the output side, C5, R5, and C4 form a compensation
network, while R6 provides 75 source-termination for the video
output. MegaQ has an native gain of 6dB, so when VIDEO OUT
is terminated into 75 (the input to a DVR, TV, etc.), R6 and the
75 terminator form a 2:1 divider, producing standard video
amplitude across the 75 terminator.
Coax Input Circuit
Figure 46 shows the input termination recommended for coaxial
cables. The differential termination resistance is now 75 to
match the characteristic impedance of the RG-59 coax cable. C3
bypasses high-frequency noise on the coax ground line to system
ground. This allows the coax ground to be independent of the
system at low frequencies (DC to 50/60Hz) to accommodate
differences in the ground potential of the remote video source(s).
The coax startup network (D1, R4, C4) prevents a rare start-up
condition that can occur when a high average-picture-level (e.g.
white screen) video signal is present on the inputs before the
power has been applied.
Dual UTP/Coax Input Circuit
If desired, it is also possible to support both UTP and coax cables
with the same PCB layout using two SPST switches that are
closed when in coax mode (Figure 47). Since UTP requires a
100 termination network while coax requires 75, a switch to
introduce a shunt 300 resistor when in coax mode will change
the termination from 100 to 75. A second switch is required
to engage C3. The addition of the coax startup circuit (D1, R4,
C4) can unbalance the capacitance of the differential pair and
degrade the CMRR in UTP applications. This in turn could cause
excess noise at long lengths of UTP. In UTP applications, if the
output signal is too noisy at long distances, an optional capacitor
Cx may be used to balance the capacitance of the differential
inputs. The value of Cx should be determined by calculating how
much trace capacitance is added by the coax startup circuit. A
typical value for a good layout is ~5pF. Note that only coax or UTP
should be connected at any one time - this circuit does not
multiplex between them.
Input Multiplexing
Placing a semiconductor multiplexer in front of this part may
increase high frequency attenuation and noise. However a
low-capacitance mechanical relay may be acceptable. Note that
changing from one channel to another in Lock Until Reset mode
will require a reset (INVERT toggle) to trigger equalization of the
For best performance, do not multiplex the inputs to the
equalizer - this can further degrade the signal. Instead, multiplex
at the output after equalization has been performed.
Stand-Alone Operation and Configuration
In its default stand-alone configuration, MegaQ features two
modes of automatic cable equalization: Lock Until Reset and
Continuous Update. Lock Until Reset is the recommended mode
for most applications.
LOCK UNTIL RESET
In the Lock Until Reset mode, once MegaQ finds the optimum
equalization and the LOCKED signal goes high, the equalization
is frozen and will not change until either the power is cycled or
the INVERT signal is toggled, which initiates a re-equalization of
the input signal. Re-equalization is usually only necessary during
device/system evaluation - in normal operation MegaQ
powers-up, acquires and equalizes the signal, and continues to
equalize until/unless it is powered-down. If the signal is lost in
Lock Until Reset mode, the LOCKED pin will not go low
until/unless the device is reset by toggling the INVERT pin. A
reset should only be necessary if the length or type of cable was
changed without cycling power.
To enable the Lock Until Reset mode, tie the LOCKED output pin
to the FREEZE input pin as shown in Figure 45 on page 20.
To generate a reset (and trigger a re-equalization), toggle the
external INVERT pin to its opposite state for at least 1ms.
Depending on the initial state of INVERT, this would be a
high-low-high or low-high-low sequence.
FIGURE 46. APPLICATION CIRCUIT FOR COAX CABLE
IN-
GND
IN+
1.0F
37.5
1k
1.0F
37.5
0.1F
VCC
0.1F
10k
MegaQ
TM
R1
R2
R3
C1
C2
C3
R4
C4
D1
5V
TVS
Z2
Z1
5V
TVS
TVS = Transient Voltage Suppressor
a.k.a. Transorb
COAX
FIGURE 47. APPLICATION CIRCUIT FOR UTP/COAX CABLE
IN-
GND
IN+
1.0F
49.9
1k
1.0F
49.9
0.1F
VCC
0.1F
10k
MegaQ
TM
300
Close all switches for
Coax
R1
R2
R3
C1
C2
C3
R4
C4
D1
SW1A
R5
SW1B
5V
TVS
Z2
Z1
5V
TVS
UTP
IN+
UTP
IN-
COAX
Cx*
*optional
5.6pF
TVS = Transient Voltage Suppressor
a.k.a. Transorb
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