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參數(shù)資料
| 型號(hào)： | ISL55100BIRZ-T |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 12/14頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC COMP DRVR/WINDOW 18V 72-QFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 4/4 |
| 規(guī)程： | LVDS |
| 電源電壓： | 15 V ~ 18 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN-EP（10x10） |
| 包裝： | 帶卷 (TR) |
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7
FN6229.1
November 24, 2008
Application Information
The ISL55100B provides Quad pin drivers and Quad dual
level comparator receivers in a small footprint. The four
channels may be used as bidirectional or split channels.
Drivers have per channel level, data, and high impedance
controls, while comparators have per channel high and low
threshold levels.
Receiver Features
The receivers are four independent window comparators that
feature high output current capability, and user defined high
and low output levels to interface with a wide variety of logic
families. Each receiver comprises two comparators and each
comparator has an independent threshold level input, making
it easy to implement window comparator functions. The CVA
and CVB pins set the threshold levels of the A and B
FIGURE 3. DRIVER ENABLE AND DISABLE TIME MEASUREMENT POINTS
FIGURE 4. RECEIVER SWITCHING TEST CIRCUIT
FIGURE 5. RECEIVER PROPAGATION DELAY MEASUREMENT POINTS
Test Circuits and Waveforms (Continued)
VO
400mV
0V
tDISL
VOL (≈VL)
1V
10%
tENH
DRV EN-
DRV EN+
DIS
EN
(FOR DATA = 0)
VREF
VO
VOH (≈VH)
2V
90%
(FOR DATA = 1)
VREF
tDISH
tENL
+
-
+
-
VINP
QA
QB
COMP HI
COMP LO
CVA
CVB
5V
QX
500mV
-500mV
tPDLH
VOH (≈5V)
VOL (≈0V)
50%
tPDHL
VINP
0V
ISL55100B
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