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參數(shù)資料
| 型號： | ISL55100BIRZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMP DRVR/WINDOW 18V 72-QFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | LVDS |
| 電源電壓： | 15 V ~ 18 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN-EP（10x10） |
| 包裝： | 帶卷 (TR) |
6
FN6229.1
November 24, 2008
POWER SUPPLIES, DRIVER/RECEIVER STATIC CONDITIONS VEXT = VEE + 5.5V, EXTERNAL LOGIC POWER OPTION USED. (Note 8)
Positive Supply Current
ICC
VCC = VH = 12V, VEE = VL = -3V,
VEXT =VEE + 5.5V, Outputs Unloaded
-35
50
mA
Negative Supply Current
IEE
VCC = VH = 12V, VEE = VL = -3V,
VEXT =VEE + 5.5V, Outputs Unloaded
-50
-35
-
mA
VEXT Supply Current
IEXT
VCC = VH = 12, VEE = VL = -3V,
VEXT =VEE + 5.5V, Outputs Unloaded
-25
40
mA
NOTES:
3. Lab characterization, room temp, Timing Parameters Matched Stimulus/Loads, Channel-to-Channel Skew < 500ps, 1ns Max by design.
4. Measured across 100pF/1k lump sum load + 15pF PCB/Scope Probe. Cap and Resistor Surface Mount/Stacked ~0.5” from Pin.
5. To Enable LOWSWING, connect LOWSWING to VEE and keep VH < VEE + 5. To disable LOWSWING, connect it to VCC.
6. When VEXT is connected to VEE (External Device Power not used) then the Minimum VCC - VEE is 12V. When VEXT is connected to an external
5.5V supply, then the minimum VCC - VEE voltage is 9V. Recommended VEXT = 5.5V as referenced to VEE.
7. ICC and IEE values are based on static conditions and will increase with pattern rates. ICC and IEE reach 400mA to 500mA at maximum data
rates (provided sufficient device cooling is employed). These currents can be reduced by 1) Reducing the VCC - VEE operating voltage 2)
Utilizing the VEXT option.
8. When using VEXT = 5.5V, current requirements of the VEXT input can approach 100mA at maximum pattern rates.
9. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Test Circuits and Waveforms
FIGURE 1. DRIVER SWITCHING TEST CIRCUIT
FIGURE 2. DRIVER PROPAGATION DELAY AND TRANSITION TIME MEASUREMENT POINTS
Electrical Specifications
Test Conditions: VCC = 12V, VEE = -3V, VH = 6V, VL = 0V, Comp-High = 5V, Comp Low = 0V, VEXT = VEE and
LOWSWING = VCC, +25°C; Unless Otherwise specified. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
1k
Ω
VO
DATA-
DRV EN+
DRV EN-
VH
VL
DOUT
DATA+
(NOTE 3)
100pF
VO
400mV
0V
tPDLH
VOH (≈VH)
VOL (≈VL)
50%
tPDHL
DATA-
DATA+
tR
tF
DATA = 1
DATA = 0
ISL55100B
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