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參數(shù)資料
| 型號： | ISL5416KI |
| 廠商： | INTERSIL CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Four-Channel Wideband Programmable DownConverter |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA256 |
| 封裝： | 17 X 17 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 37/71頁 |
| 文件大?。?/td> | 2013K |
| 代理商： | ISL5416KI |
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37
TABLE 24. XOUT DATA VERSUS TIME SLOT ROUTING, TIME SLOTS 0, 1 (IWA = 0*01h)
RESET STATE = 0x00000000h
X = A, B, C, D (Descriptions below are for the channels 0/1 multiplexer IWA = 0101h (MUX 01AC). See figure 10 for corresponding signals
and buses for the other multiplexers)
P(31:0)
FUNCTION
31:30
RESERVED. Set to 0.
29:28
XOUT TIMING SOURCE. The output slot counter is started by a new sample from
00 = Channel 0
01 = Channel 1
10 = Channel 2
11 = Channel 3
This allows two output busses to be used by one channel if the other channel is disabled.
27
INVERT (ONES COMPLEMENT) XOUT BUS.
1 = ones complement XOUT(15:0). By setting this bit for BOUT or DOUT, the AOUT and BOUT and/or COUT and DOUT can provide
complementary output signals.
26
ASSERT FSYNCX DURING SLOT 1.
1 = assert FSYNCX for this time slot.
0 = no FSYNCX.
25
ENABLE TO Cout DURING SLOT 1. (OE_01C)
1 = route the data selected in 23:16 and SYNC enabled in bit 26 to the Cout and SYNCC pins. Provided for multiplexing A and B with
C and D channels.
24
ENABLE TO Aout DURING SLOT 1. (OE_01A)
1 = route the data selected in 23:16 and SYNC enabled in bit 26 to the Aout and SYNCA pins. Provided for multiplexing A and B with
C and D channels.
23:20
SLOT 1, HIGH BYTE. Data output from the A high byte multiplexer for slot 1. See Table 29
for coding.
19:16
SLOT 1, LOW BYTE. Data output from the A low byte multiplexer for slot 1. See Table 29 for coding.
15:11
RESERVED. Set to 0.
10
ASSERT FSYNCX DURING SLOT 0.
1 = assert FSYNCX for this time slot.
0 = no FSYNCX.
9
ENABLE TO Cout DURING SLOT 0.
1 = route the data selected in 7:0 and SYNC enabled in bit 10 to the Cout and SYNCC pins. Provided for multiplexing A and B with
C and D channels.
8
ENABLE TO Aout DURING SLOT 0.
1 = route the data selected in 7:0 and SYNC enabled in bit 10 to the Aout and SYNCA pins. Provided for multiplexing A and B with
C and D channels.
7:4
SLOT 0, HIGH BYTE. Data output from the A high byte multiplexer for slot 0. See Table 29
for coding.
3:0
SLOT 0, LOW BYTE. Data output from the A low byte multiplexer for slot 0. See Table 29 for coding.
TABLE 25. XOUT DATA VERSUS TIME SLOT ROUTING, TIME SLOTS 2, 3 (IWA = 0*02h)
RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:27
RESERVED. Set to 0.
26:16
SLOT 3 CONTROL (see Table 24)
15:11
RESERVED. Set to 0.
10:0
SLOT 2 CONTROL (see Table 24)
TABLE 26. XOUT DATA VERSUS TIME SLOT ROUTING, TIME SLOTS 4, 5 (IWA = 0*03h)
RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:27
RESERVED. Set to 0.
26:16
SLOT 5 CONTROL (see Table 24)
15:11
RESERVED. Set to 0.
10:0
SLOT 4 CONTROL (see Table 24)
ISL5416
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