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參數(shù)資料
| 型號： | ISL43485IBZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX 1TX/1RX 3V RS-485 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RS422，RS485 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
4
FN6071.1
March 15, 2005
Three-State (high impedance)
Receiver Output Current
IOZR
0.4V
≤ VO ≤ 2.4V
Full
-1
-
1
A
Receiver Input Resistance
RIN
-7V
≤ VCM ≤ 12V
Full
12
19
-
k
No-Load Supply Current (Note 3)
ICC
DI = 0V or VCC
DE = VCC,
RE = 0V
or VCC
Full
-
0.75
1.2
mA
DE = 0V,
RE = 0V
Full
-
0.65
1
mA
Shutdown Supply Current
ISHDN
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
15
100
nA
Driver Short-Circuit Current,
VO = High or Low
IOSD1
DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 4)
Full
-
250
mA
Receiver Short-Circuit Current
IOSR
0V
≤ VO ≤ VCC
Full
8
-
60
mA
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
(Figure 2A)
Full
30
50
-
Mbps
Driver Differential Output Delay
tDD
RDIFF = 60, CL = 15pF (Figure 2A)
Full
3
10
25
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 60, CL = 15pF (Figure 2A)
Full
3
6
12
ns
Driver Input to Output Delay
tPLH, tPHL RL = 27, CL = 15pF (Figure 2C)
Full
6
10
22
ns
Driver Output Skew
tSKEW
RL = 27, CL = 15pF (Figure 2C)
Full
-
1
5
ns
Driver Enable to Output High
tZH
RL = 110, CL = 50pF, SW = GND (Figure 3),
(Note 5)
Full
-
45
90
ns
Driver Enable to Output Low
tZL
RL = 110, CL = 50pF, SW = VCC (Figure 3),
(Note 5)
Full
-
45
90
ns
Driver Disable from Output High
tHZ
RL = 110, CL = 50pF, SW = GND (Figure 3)
Full
-
60
90
ns
Driver Disable from Output Low
tLZ
RL = 110, CL = 50pF, SW = VCC (Figure 3)
Full
-
70
100
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 110, CL = 50pF, SW = GND (Figure 3),
(Notes 7, 8)
Full
-
115
150
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 110, CL = 50pF, SW = VCC (Figure 3),
(Notes 7, 8)
Full
-
115
150
ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
VID ≥ 1.5V with tr/tf = 10ns, RO tH & tL ≥ 60% tUI
(Figure 4)
Full
27
35
-
Mbps
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Full
25
45
80
ns
Receiver Skew | tPLH - tPHL |tSKD
(Figure 4)
Full
-
2
12
ns
Receiver Enable to Output High
tZH
RL = 1k, CL = 15pF, SW = GND (Figure 5),
(Note 6)
Full
-
11
25
ns
Receiver Enable to Output Low
tZL
RL = 1k, CL = 15pF, SW = VCC (Figure 5),
(Note 6)
Full
-
11
25
ns
Receiver Disable from Output High
tHZ
RL = 1k, CL = 15pF, SW = GND (Figure 5)
Full
-
7
20
ns
Receiver Disable from Output Low
tLZ
RL = 1k, CL = 15pF, SW = VCC (Figure 5)
Full
-
7
20
ns
Electrical Specifications
Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 2 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
ISL43485
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