12 FN6800.8 November 15, 2012 FIGURE 22. SPICE NET LIST *ISL28114 Macromodel - covers following *products *ISL2811" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISL28214FBZ-T13
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 4/23闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OPAMP GP RRIO 5MHZ DUAL 8SOIC
妯欐簴鍖呰锛� 2,500
鏀惧ぇ鍣ㄩ鍨嬶細 閫氱敤
闆昏矾鏁�(sh霉)锛� 2
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 2.5 V/µs
澧炵泭甯跺绌嶏細 5MHz
闆绘祦 - 杓稿叆鍋忓锛� 3pA
闆诲 - 杓稿叆鍋忕Щ锛� 500µV
闆绘祦 - 闆绘簮锛� 300µA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 31mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 1.8 V ~ 5.5 V锛�±0.9 V ~ 2.5 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 甯跺嵎 (TR)
ISL28114, ISL28214, ISL28414
12
FN6800.8
November 15, 2012
FIGURE 22. SPICE NET LIST
*ISL28114 Macromodel - covers following
*products
*ISL28114
*ISL28214
*ISL28414
**
*Revision History:
*Revision C, LaFontaine October 20th 2011
*Model for Noise to match measured part,
* quiescent supply currents,
*CMRR 72dB
*fcm=100kHz, AVOL 90dB f=125Hz, SR =
*2.5V/us, GBWP 5MHz, 2nd pole 10Mhz
output voltage clamp and short ckt current
*limit.
**
*Copyright 2011 by Intersil Corporation
*Refer to data sheet "LICENSE
*STATEMENT" Use of this model indicates
*your acceptance with the terms and
*provisions in the License Statement.
*
*Intended use:
*This Pspice Macromodel is intended to give
*typical DC and AC performance
*characteristics under a wide range of
*external circuit configurations using
*compatible simulation platforms - such as
*iSim PE.
*
*Device performance features supported by
*this model:
*Typical, room temp., nominal power supply
*voltages used to produce the following
*characteristics:
*Open and closed loop I/O impedances
*Open loop gain and phase
*Closed loop bandwidth and frequency
*response
*Loading effects on closed loop frequency
*response
*Input noise terms including 1/f effects
*Slew rate
*Input and Output Headroom limits to I/O
*voltage swing
*Supply current at nominal specified supply
*voltages
**
*Device performance features NOT
*supported by this model
*Harmonic distortion effects
*Disable operation (if any)
*Thermal effects and/or over temperature
*parameter variation
*Limited performance variation vs. supply
*voltage is modeled
*Part to part performance variation due to
*normal process parameter spread
*Any performance difference arising from
*different packaging
* source
* Connections:
+input
*
|
-input
*
|
+Vsupply
*
|
-Vsupply
*
|
output
*
|
.subckt ISL28114 Vin+ Vin- V+ V- VOUT
* source ISL28114_DS rev2
*
*Voltage Noise
E_En VIN+ EN 28 0 1
D_D13 29 28 DN
V_V9 29 0 0.425
R_R21 28 0 30
*
*Input Stage
M_M14 3 1 5 5 NCHANNELMOSFET
M_M15 4 VIN- 6 6 NCHANNELMOSFET
M_M16 11 VIN- 9 9 PMOSISIL
M_M17 12 1 10 10 PMOSISIL
I_I1 7 V-- DC 5e-3
I_I2 V++ 8 DC 5e-3
I_IOS VIN- 1 DC 25e-12
G_G1A V++ 14 4 3 351
G_G2A V-- 14 11 12 351
V_V1 V++ 2 1e-6
V_V2 13 V-- 1e-6
R_R1 3 2 4.0004
R_R2 4 2 4.0004
R_R3 5 7 10
R_R4 7 6 10
R_R5 9 8 10
R_R6 8 10 10
R_R7 13 11 4
R_R8 13 12 4
R_RA1 14 V++ 1
R_RA2 V-- 14 1
C_CinDif VIN- EN 1.02E-12
C_Cin1 V-- EN 1.26e-12
C_Cin2 V-- VIN- 1.26e-12
*
*1st Gain Stage
G_G1 V++ 16 15 VMID 334.753e-3
G_G2 V-- 16 15 VMID 334.753e-3
V_V3 17 16 .61
V_V4 16 18 .61
D_D1 15 VMID DX
D_D2 VMID 15 DX
D_D3 17 V++ DX
D_D4 V-- 18 DX
R_R9 15 14 100
R_R10 15 VMID 1e9
R_R11 16 V++ 1
R_R12 V-- 16 1
*
*2nd Gain Stage
G_G3 V++ VG 16 VMID 24.893e-3
G_G4 V-- VG 16 VMID 24.893e-3
V_V5 19 VG .604
V_V6 VG 20 .604
D_D5 19 V++ DX
D_D6 V-- 20 DX
R_R13 VG V++ 636.658e3
R_R14 V-- VG 636.658e3
C_C2 VG V++ 2E-09
C_C3 V-- VG 2E-09
*
*Mid supply Ref
E_E4 VMID V-- V++ V-- 0.5
E_E2 V++ 0 V+ 0 1
E_E3 V-- 0 V- 0 1
I_ISY V+ V- DC 300e-6
*
*Common Mode Gain Stage with Zero
G_G5 V++ VC VCM VMID 2.5118E-8
G_G6 V-- VC VCM VMID 2.5118E-8
E_EOS 1 EN VC VMID 1e-3
R_R15 VC 21 10e3
R_R16 22 VC 10e3
R_R22 EN VCM 5e11
R_R23 VCM VIN- 5e11
L_L1 21 V++ 15.9159e-3
L_L2 22 V-- 15.9159e-3
*
*Pole Stage
G_G7 V++ 23 VG VMID 6.283e-4
G_G8 V-- 23 VG VMID 6.283e-4
R_R17 23 V++ 1591.596
R_R18 V-- 23 1591.596
C_C4 23 V++ 10e-12
C_C5 V-- 23 10e-12
*
*Output Stage with Correction Current
Sources
G_G9 26 V-- VOUT 23 0.02
G_G10 27 V-- 23 VOUT 0.02
G_G11 VOUT V++ V++ 23 0.02
G_G12 V-- VOUT 23 V-- 0.02
V_V7 24 VOUT .08
V_V8 VOUT 25 .08
D_D7 23 24 DX
D_D8 25 23 DX
D_D9 V++ 26 DX
D_D10 V++ 27 DX
D_D11 V-- 26 DY
D_D12 V-- 27 DY
R_R19 VOUT V++ 50
R_R20 V-- VOUT 50
.model pmosisil pmos (kp=16e-3 vto=-0.6)
.model NCHANNELMOSFET nmos (kp=3e-3
vto=0.6)
.model DN D(KF=6.69e-9 AF=1)
.MODEL DX D(IS=1E-12 Rs=0.1)
.MODEL DY D(IS=1E-15 BV=50 Rs=1)
.ends ISL28114
鐩搁棞(gu膩n)PDF璩囨枡
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鍙冩暩(sh霉)鎻忚堪
ISL28214FBZ-T7 鍔熻兘鎻忚堪:IC OPAMP GP RRIO 5MHZ DUAL 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:2,500 绯诲垪:MicroAmplifier™ 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞�(zhu菐n)鎻涢€熺巼:3.5 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:5pA 闆诲 - 杓稿叆鍋忕Щ:1500µV 闆绘祦 - 闆绘簮:220µA 闆绘祦 - 杓稿嚭 / 閫氶亾:60mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):4.5 V ~ 36 V锛�±2.25 V ~ 18 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-SOIC 鍖呰:甯跺嵎 (TR)
ISL28214FHZ-T7 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 ISL28214FHZ Pb-Free Dual General Purpose Micropower, RRIO Op RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
ISL28214FHZ-T7A 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 ISL28214FHZ Pb-Free Dual General Purpose Micropower, RRIO Op RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
ISL28214FUZ 鍔熻兘鎻忚堪:IC OPAMP GP RRIO 5MHZ DUAL 8MSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:73 绯诲垪:Over-The-Top® 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:0.07 V/µs 澧炵泭甯跺绌�:200kHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:1nA 闆诲 - 杓稿叆鍋忕Щ:285µV 闆绘祦 - 闆绘簮:50µA 闆绘祦 - 杓稿嚭 / 閫氶亾:25mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):2 V ~ 44 V锛�±1 V ~ 22 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:16-WFDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:16-DFN-EP锛�5x3锛� 鍖呰:绠′欢
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