- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗9995 > ISL26310FBZ (Intersil)IC ADC 12BIT SPI/SRL 125K 8SOIC PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | ISL26310FBZ |
| 寤犲晢锛� | Intersil |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 14/23闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC ADC 12BIT SPI/SRL 125K 8SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 980 |
| 浣嶆暩(sh霉)锛� | 12 |
| 閲囨ǎ鐜囷紙姣忕锛夛細 | 125k |
| 鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� | 涓茶锛孲PI? |
| 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 | 1 |
| 鍔熺巼鑰楁暎锛堟渶澶э級锛� | 80mW |
| 闆诲闆绘簮锛� | 鍠浕婧� |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 绠′欢 |
| 杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� | 1 鍊�(g猫)宸垎锛屽柈妤� |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)绗�8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)鐣�(d膩ng)鍓嶇14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)绗�21闋�(y猫)绗�22闋�(y猫)绗�23闋�(y猫)
ISL26310, ISL26311, ISL26312, ISL26313, ISL26314, ISL26315, ISL26319
21
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7549.2
February 26, 2014
For additional products, see www.intersil.com/product_tree
About Intersil
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management
semiconductors. The company's products address some of the largest markets within the industrial and infrastructure, personal
computing and high-end consumer markets. For more information about Intersil, visit our website at www.intersil.com.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting
www.intersil.com/en/support/ask-an-expert.html. Reliability reports are also available from our website at
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
August 23, 2013
FN7549.2 Updated Figure 22 on page 13, IDEAL TRANSFER CHARACTERISTICS, SINGLE-ENDED INPUT.
Block diagram on page 2, corrected temperature sensor drawing and added an input to the Mux and ADC section.
June 22, 2012
FN7549.1 Added Part Numbers ISL26310, ISL26311, ISL26313 throughout document
Added SOIC Package throughout document
Updated Features List by Removing following bullets:
o 125kSPS Conversion Rate
o Pin-Compatible 2/4-Channel Differential or 4/8-Channel Single-Ended Inputs
o Internal 2.5V Reference
o Available in Popular TSSOP Package
o Pb-Free (RoHS Compliant)
Updated Functional Block Diagram on page 1 by removing voltage reference
Updated Pin Compatible Family by removing ISL264XX PARTS
Updated Pin Description Table to include all parts
Updated conditions in Electrical Spec Table from:
Electrical Specifications VREF+ = VDD(External) V, VDD = 3.3V to 5V, VCM = VDD/2, SCLK = 20MHz...
To:
Electrical Specifications VREF = VDD V, VDD = 2.7V to 5V, VCM = VDD/2, SCLK = 20MHz...
Removed VREFIN specs from Voltage Reference Section
Removed Test Level from tACQ in Auto Power Down Mode
Replaced Figures 3 and 4 DNL and INL
Replaced Figure 17 by changing from single line curve to frequency mode
Rewrote Functional Description Section
January 11, 2012
FN7549.0 Initial Release.
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| ISL26310FBZ-T | 鍔熻兘鎻忚堪:IC ADC 12BIT SPI/SRL 125K 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:1.8M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:1.82W 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:48-LQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:48-LQFP锛�7x7锛� 鍖呰:绠′欢 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊�(g猫)鍠锛屽柈妤� |
| ISL26310FBZ-T7A | 鍔熻兘鎻忚堪:IC ADC 12BIT SPI/SRL 125K 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:1.8M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:1.82W 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:48-LQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:48-LQFP锛�7x7锛� 鍖呰:绠′欢 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊�(g猫)鍠锛屽柈妤� |
| ISL26311 | 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels |
| ISL26311FBZ | 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26311FBZ 12-BIT, 125KSPS, SINGLE CH/ENDED DIFFERENTIAL SA - Rail/Tube 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:IC ADC 12BIT SPI/SRL 125K 8-SOIC |
| ISL26311FBZ-T | 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26311FBZ 12-BIT, 125KSPS, SINGLE CH/ENDED DIFFERENTIAL SA - Tape and Reel 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:IC ADC 12BIT SPI/SRL 125K 8-SOIC |
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