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參數(shù)資料
| 型號： | ISL26134AVZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 6/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 24BIT SRL 80SPS 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 80 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 80mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個(gè)差分，雙極 |
ISL26132, ISL26134
14
FN6954.1
September 9, 2011
Serial Clock Input (SCLK)
The serial clock input is provided with hysteresis to minimize
false triggering. Nevertheless, care should be taken to ensure
reliable clocking.
Filter Settling Time and ADC Latency
Whenever the analog signal into the ISL26132, ISL26134
converters is changed, the effects of the digital filter must be
taken into account. The filter takes four data ready periods for
the output code to fully reflect a new value at the analog input. If
the multiplexer control input is changed, the modulator and the
digital filter are reset, and the device uses four data ready
periods to fully settle to yield a digital code that accurately
represents the analog input. Therefore, from the time the control
inputs for the multiplexer are changed until the SDO/RDY goes
low, four data ready periods will elapse. The settling time delay
after a multiplexer channel change is listed in Table 8 for the
converter operating in continuous conversion mode.
0
-50
-100
-150
0
1020
30
40
50607080
90 100
FREQUENCY (Hz)
GAIN
(dB)
DATA RATE = 10 SPS
DATA RATE = 10Sps
FIGURE 26. 10Sps: FREQUENCY RESPONSE OUT TO 100Hz
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
45
50
55
60
65
FREQUENCY (Hz)
GAIN
(dB)
DATA RATE = 10Sps
FIGURE 27. 10Sps: 50/60Hz NOISE REJECTION, 45Hz TO 65Hz
TABLE 8. SETTLING TIME
PARAMETER
DESCRIPTION
(fCLK = 4.9152MHz)
MIN
MAX
UNITS
tS
A0, A1, SPEED, Gain1, Gain0 change
set-up time
40
50
s
t1
Settling time
SPEED = 1
54
55
ms
SPEED = 0
404
405
ms
FIGURE 28. SDO/RDY DELAY AFTER MULTIPLEXER CHANGE
SDO/RDY
tS
t1
A0, A1, SPEED, Gain1, Gain0
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| ISL26134AVZ-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC ISL26134AVZ LW-NOISE 24-BIT TI-COMP D/S RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ISL26134AVZ-T7A | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC ISL26134AVZ LW-NOISE 24BIT DELTASIGMA ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ISL26310 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels |
| ISL26310FBZ | 功能描述:IC ADC 12BIT SPI/SRL 125K 8SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個(gè)單端，單極 |
| ISL26310FBZ-T | 功能描述:IC ADC 12BIT SPI/SRL 125K 8SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個(gè)單端，單極 |
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