5 FN7590.0 March 15, 2011 VOH Output Swing High I
參數(shù)資料
型號: ISL24212IRTZ
廠商: Intersil
文件頁數(shù): 8/12頁
文件大?。?/td> 0K
描述: IC PROG 8BIT VCOM CALIBRTR 10TDF
標(biāo)準(zhǔn)包裝: 100
類型: 校準(zhǔn)器
應(yīng)用: LCD 驅(qū)動器,基準(zhǔn)電壓發(fā)生器
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-TDFN(3x3)
包裝: 管件
ISL24212
5
FN7590.0
March 15, 2011
VOH
Output Swing High
IL = 5mA
17.85
17.9
V
ISC
Short Circuit Current (Sinking)
300
430
mA
Short Circuit Current (Sourcing)
450
555
mA
SR
Slew Rate (Rising)
1K
Ω || 8pF Load
70
116
V/s
Slew Rate (Falling)
1K
Ω || 8pF Load
50
93
V/s
tS
Settling Time to 0.2%
150
ns
BW
-3dB Bandwidth
60
MHz
EEPROM CHARACTERISTICS
tPROG
EEPROM Programming Time (internal)
100
ms
UP/DOWN COUNTER CONTROL INPUTS (SEE FIGURE 11)
VIH
CE and CTL Input Logic High Threshold
0.7*VDD
V
VIL
CE and CTL Input Logic Low Threshold
0.3*VDD
V
ICS_PD
CE Input Pull Down Current Sink
0.5
1.5
A
ICTL
CTL Input Bias Current
CTL = GND (sourcing)
7
15
A
CTL = VDD (sinking)
7
15
A
tST
CE to CTL Start Delay
50
s
tREAD
EEPROM Recall Time (after CE de-asserted)
10
ms
tH_REJ
CTL High Pulse Rejection Width
20
s
tL_REJ
CTL Low Pulse Rejection Width
20
s
tH_MIN
CTL High Minimum Valid Pulse Width
200
s
tL_MIN
CTL Low Minimum Valid Pulse Width
200
s
tMTC
CTL Minimum Time Between Counts
10
s
VPROG
CTL EEPROM Program Voltage (see Figure 9)
4.9
19
V
tPROG
CTL EEPROM Programming Signal Time
200
s
tH_PROP
CTL High-to-Mid to DVR_OUT propagation time
65
s
tL_PROP
CTL Low-to-Mid to DVR_OUT propagation time
65
s
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Electrical Specifications Test Conditions: VDD = 3.3V, AVDD = 18V, RSET = 5kΩ, R1 = 10kΩ, R2 = 10kΩ, (See Figure 5), VCOM_OUT pin
connected to INN, unless otherwise specified. Typicals are at TA = +25°C. Boldface limits apply over the operating temperature range,
-40°C to +85°C.
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
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