參數(shù)資料
型號: ISL1209IU10-TK
廠商: INTERSIL CORP
元件分類: XO, clock
英文描述: Low Power RTC with Battery Backed SRAM and Event Detection
中文描述: REAL TIME CLOCK, PDSO8
封裝: PLASTIC, MO-187BA, MSOP-8
文件頁數(shù): 7/24頁
文件大?。?/td> 416K
代理商: ISL1209IU10-TK
7
FN6109.1
September 27, 2005
General Description
The ISL1209 device is a low power Real Time Clock with
Security and Event function timing and crystal
compensation, clock/calendar, power fail indicator, periodic
or polled alarm, intelligent battery backup switching, and
battery-backed user SRAM.
The Event Detection function can be used for tamper
detection, security or other chassis or generic system
monitoring. Upon a valid event detection, the ISL1209 sets
the Event Detection bit (EVT bit) in the status register and,
can optionally: 1) Issue an Event Output signal (EVDET pin),
2) At the time the event occurred, stop the RTC registers
from advancing. The event monitor can function in both main
V
DD
and battery back up modes. The event monitor can also
be configured for various input detection rates to optimize
power consumption for the application. In addition, the Event
Monitor pin (EVIN) has a selectable glitch filter to avoid
switch de-bouncing.
The oscillator uses an external, low-cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes, and seconds. The device has calendar
registers for date, month, year and day of the week. The
calendar is accurate through 2099, with automatic leap year
correction.
The ISL1209's powerful alarm can be set to any
clock/calendar value for a match. For example, every
minute, every Tuesday or at 5:23 AM on March 21. The
alarm status is available by checking the Status Register, or
the device can be configured to provide a hardware interrupt
via the IRQ pin. There is a repeat mode for the alarm
allowing a periodic interrupt every minute, every hour, every
day, etc.
The device also offers a backup power input pin. This V
BAT
pin allows the device to be backed up by battery or
SuperCap with automatic switchover from V
DD
to V
BAT
. The
entire ISL1209 device is fully operational from V
DD
=2.7V to
5.5V and the clock/calendar portion of the device remains
fully operational in battery backup mode down to 1.8V
(Standby Mode).
Pin Description
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal
is used with the ISL1209 to supply a timebase for the real
time clock. Internal compensation circuitry provides high
accuracy over the operating temperature range from
-40°C to +85°C. This oscillator compensation network can
be used to calibrate the crystal timing accuracy over
temperature either during manufacturing or with an external
temperature sensor and microcontroller for active
compensation. The device can also be driven directly from a
32.768kHz source at pin X1.
V
BAT
This input provides a backup supply voltage to the device.
V
BAT
supplies power to the device in the event that the V
DD
supply fails. This pin can be connected to a battery, a Super
Cap or tied to ground if not used.
EVIN (Event Input)
The EVIN pin is an input that is used to detect an externally
monitored event. When a high signal is present at the EVIN
pin, an “event” is detected. This input may be used for
various monitoring functions, such as the opening of a
detection switch on a chassis or door. The event detection
circuit can be user enabled or disabled (see EVEN bit) and
provides the option to be operational in battery backup
modes (see EVBATB bit). When the event detection is
disabled the EVIN pin is gated OFF. See functional
Description for more details.
EVDET (Event Detect Output)
The EVDET is an open drain output which will go low when
an event is detected at the EVIN pin. If the event detection
function is enabled, the EVDET output will go low and stay
low until the EVT bit is cleared (see EVIN pin description).
IRQ/F
OUT
(Interrupt Output/Frequency Output)
This dual function pin can be used as an interrupt or
frequency output pin. The IRQ/F
OUT
mode is selected via
the frequency out control bits of the control/status register.
Interrupt Mode.
The pin provides an interrupt signal
output. This signal notifies a host processor that an alarm
FIGURE 7. STANDARD OUTPUT LOAD FOR TESTING THE
DEVICE WITH V
DD
= 5.0V
SDA
AND
IRQ/FOUT
1533
100pF
5.0V
FOR V
OL
= 0.4V
AND I
OL
= 3mA
EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR V
DD
= 5V
FIGURE 8. RECOMMENDED CRYSTAL CONNECTION
X1
X2
ISL1209
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