3 FN6659.3 November 22, 2011 Table of Contents Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Therma" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� ISL12022IBZ
寤犲晢锛� Intersil
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 23/29闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC RTC/CALENDAR TEMP SNSR 8-SOIC
鎳�(y墨ng)鐢ㄨ(shu艒)鏄庯細 Addressing Power Issues in Real Time Clock Appls
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Solutions for Industrial Control Applications
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 98
椤炲瀷锛� 鏅�(sh铆)閻�/鏃ユ
鐗归粸(di菐n)锛� 璀﹀牨(b脿o)鍣紝澶忎护鏅�(sh铆)锛岄枏骞�锛孲RAM
瀛樺劜(ch菙)瀹归噺锛� 128B
鏅�(sh铆)闁撴牸寮忥細 HH:MM:SS锛�12/24 灏忔檪(sh铆)锛�
鏁�(sh霉)鎿�(j霉)鏍煎紡锛� YY-MM-DD-dd
鎺ュ彛锛� I²C锛�2 绶氫覆鍙�
闆绘簮闆诲锛� 2.7 V ~ 5.5 V
闆诲 - 闆绘簮锛岄浕姹狅細 1.8 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 1245 (CN2011-ZH PDF)
ISL12022
3
FN6659.3
November 22, 2011
Table of Contents
I2C Interface Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
X1, X2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
IRQ/FOUT (Interrupt Output/Frequency Output) . . . . . . . . . . . 9
Serial Clock (SCL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
VDD, GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Power Control Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Normal Mode (VDD) to Battery-Backup Mode (VBAT). . . . . . . 10
Battery-Backup Mode (VBAT) to Normal Mode (VDD). . . . . . . 10
Power Failure Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Brownout Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Battery Level Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Single Event and Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Frequency Output Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
General Purpose User SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . 11
I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Oscillator Compensation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Addresses [00h to 06h] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Addresses [07h to 0Fh] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status Register (SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Interrupt Control Register (INT). . . . . . . . . . . . . . . . . . . . . . . . 15
VDD Brownout Trip Voltage BITS (VDDTrip<2:0) . . . . . . . . . . 16
Initial AT and DT Setting Register (ITRO) . . . . . . . . . . . . . . . . 16
BETA Register (BETA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Final Analog Trimming Register (FATR). . . . . . . . . . . . . . . . . 19
Final Digital Trimming Register (FDTR) . . . . . . . . . . . . . . . . . 19
ALARM Registers (10h to 15h) . . . . . . . . . . . . . . . . . . . . . . . . 20
DST Control Registers (DSTCR) . . . . . . . . . . . . . . . . . . . . . . . . 21
TEMP Registers (TEMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
NPPM Registers (NPPM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
XT0 Registers (XT0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ALPHA Hot Register (ALPHAH) . . . . . . . . . . . . . . . . . . . . . . . . 23
Addresses [00h to 7Fh] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
I2C Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Protocol Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power Supply Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 25
Battery-Backup Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Oscillator Crystal Requirements . . . . . . . . . . . . . . . . . . . . . . . 26
Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Crystal Oscillator Frequency Compensation . . . . . . . . . . . . . 27
Measuring Oscillator Accuracy . . . . . . . . . . . . . . . . . . . . . . . . 27
Temperature Compensation Operation . . . . . . . . . . . . . . . . . 28
Daylight Savings Time (DST) Example . . . . . . . . . . . . . . . . . . 28
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
VE-B2L-MY-F4 CONVERTER MOD DC/DC 28V 50W
ISL12027AIV27Z IC RTC/CALENDAR EEPROM 8TSSOP
ISL12026IVZ IC RTC/CALENDAR W/EEPROM 8-TSSOP
VI-JWM-MZ CONVERTER MOD DC/DC 10V 25W
ISL12026IBZ IC RTC/CALENDAR EEPROM 8-SOIC
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鍙冩暩(sh霉)鎻忚堪
ISL12022IBZ-T 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� REAL TIME CLK/CLNDR W/TEMP COMP 8 L RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube
ISL12022IBZ-T7A 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� REAL TIME CLK/CLNDR W/TEMP COMP 8 L RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube
ISL12022M 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Low Power RTC with Battery Backed SRAM, Integrated 卤5ppm Temperature Compensation, and Auto Daylight Saving
ISL12022M_09 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Low Power RTC with Battery Backed SRAM, Integrated 卤5ppm Temperature Compensation, and Auto Daylight Saving
ISL12022M_10 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Low Power RTC with Battery Backed SRAM,Integrated 卤5ppm Temperature Compensation and Auto Daylight Saving
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