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| 型號： | ISL12022IBZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 25/29頁 |
| 文件大小： | 0K |
| 描述： | IC RTC/CALENDAR TEMP SNSR 8-SOIC |
| 應用說明： | Addressing Power Issues in Real Time Clock Appls |
| 產(chǎn)品培訓模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 2,500 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，SRAM |
| 存儲容量： | 128B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
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ISL12022
5
FN6659.3
November 22, 2011
Power-Down Timing Test Conditions: VDD = +2.7 to +5.5V, TA = -40°C to +85°C, unless otherwise stated. Boldface limits apply over the
operating temperature range, -40°C to +85°C
SYMBOL
PARAMETER
CONDITIONS
MIN
(Note 13)
TYP
(Note 9)
MAX
(Note 13)
UNITS
NOTES
VDD SR-
VDD Negative Slew Rate
10
V/ms
VDDSR+
VDD Positive Slew Rate, Minimum
0.05
V/ms
I2C Interface Specifications Test Conditions: VDD = +2.7 to +5.5V, TA = -40°C to +85°C, unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +85°C
SYMBOL
PARAMETER
MIN
(Note 13)
TYP
(Note 9)
MAX
(Note 13)
UNITS
NOTES
VIL
SDA and SCL Input Buffer LOW Voltage
-0.3
0.3 x VDD
V
VIH
SDA and SCL Input Buffer HIGH Voltage
0.7 x VDD
VDD + 0.3
V
Hysteresis SDA and SCL Input Buffer Hysteresis
0.05 x VDD
V
VOL
SDA Output Buffer LOW Voltage,
Sinking 3mA
VDD = 5V, IOL = 3mA
0
0.02
0.4
V
CPIN
SDA and SCL Pin Capacitance
TA = +25°C, f = 1MHz, VDD = 5V,
VIN =0V, VOUT = 0V
10
pF
fSCL
SCL Frequency
400
kHz
tIN
Pulse Width Suppression Time at SDA
and SCL Inputs
Any pulse narrower than the max
spec is suppressed.
50
ns
tAA
SCL Falling Edge To SDA Output Data
Valid
SCL falling edge crossing 30% of
VDD, until SDA exits the 30% to
70% of VDD window.
900
ns
tBUF
Time the Bus Must be Free Before the
Start of a New Transmission
SDA crossing 70% of VDD during
a STOP condition, to SDA
crossing 70% of VDD during the
following START condition.
1300
ns
tLOW
Clock LOW Time
Measured at the 30% of VDD
crossing.
1300
ns
tHIGH
Clock HIGH Time
Measured at the 70% of VDD
crossing.
600
ns
tSU:STA
START Condition Setup Time
SCL rising edge to SDA falling
edge. Both crossing 70% of VDD.
600
ns
tHD:STA
START Condition Hold Time
From SDA falling edge crossing
30% of VDD to SCL falling edge
crossing 70% of VDD.
600
ns
tSU:DAT
Input Data Setup Time
From SDA exiting the 30% to
70% of VDD window, to SCL rising
edge crossing 30% of VDD.
100
ns
tHD:DAT
Input Data Hold Time
From SCL falling edge crossing
30% of VDD to SDA entering the
30% to 70% of VDD window.
0900
ns
tSU:STO
STOP Condition Setup Time
From SCL rising edge crossing
70% of VDD, to SDA rising edge
crossing 30% of VDD.
600
ns
tHD:STO
STOP Condition Hold Time
From SDA rising edge to SCL
falling edge. Both crossing 70%
of VDD.
600
ns
tDH
Output Data Hold Time
From SCL falling edge crossing
30% of VDD, until SDA enters the
30% to 70% of VDD window.
0
ns
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| ISL12022IBZ-T7A | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/TEMP COMP 8 L RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12022M | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation, and Auto Daylight Saving |
| ISL12022M_09 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation, and Auto Daylight Saving |
| ISL12022M_10 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM,Integrated ±5ppm Temperature Compensation and Auto Daylight Saving |
| ISL12022MA | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving |
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