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| 型號： | ISL12022IBZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CALENDAR TEMP SNSR 8-SOIC |
| 應(yīng)用說明： | Addressing Power Issues in Real Time Clock Appls |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標準包裝： | 2,500 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，SRAM |
| 存儲容量： | 128B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
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ISL12022
10
FN6659.3
November 22, 2011
Interrupt Mode. The pin provides an interrupt signal output.
This signal notifies a host processor that an alarm has
occurred and requests action. It is an active low output.
Frequency Output Mode. The pin outputs a clock signal, which
is related to the crystal frequency. The frequency is user
selectable and enabled via the I2C bus.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of the
device. The input buffer on this pin is always active (not gated). It
is disabled when the backup power supply on the VBAT pin is
activated to minimize power consumption.
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out of
the device. It has an open drain output and may be ORed with
other open drain or open collector outputs. The input buffer is
always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor. The
output circuitry controls the fall time of the output signal with the
use of a slope controlled pull-down. The circuit is designed for
400kHz I2C interface speeds. It is disabled when the backup
power supply on the VBAT pin is activated.
VDD, GND
Chip power supply and ground pins. The device will operate with
a power supply from VDD = 2.7V to 5.5VDC. A 0.1F capacitor is
recommended on the VDD pin to ground. The VDD Negative and
VDD Positive Slew Rate specifications have to be observed.
Functional Description
Power Control Operation
The power control circuit accepts a VDD and a VBAT input. Many
types of batteries can be used with Intersil RTC products. For
example, 3.0V or 3.6V Lithium batteries are appropriate, and
battery sizes are available that can power the ISL12022 for up to
10 years. Another option is to use a super capacitor for
applications where VDD is interrupted for up to a month. See the
“Application Section” on page 25 for more information.
Normal Mode (VDD) to Battery-Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the following
conditions must be met:
Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery-Backup Mode (VBAT) to Normal Mode
(VDD)
The ISL12022 device will switch from the VBAT to VDD mode
when one of the following conditions occurs:
Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
These power control situations are illustrated in Figures 12
and 13.
The I2C bus is deactivated in battery-backup mode to reduce
power consumption. Aside from this, all RTC functions are
operational during battery-backup mode. Except for SCL and SDA,
all the inputs and outputs of the ISL12022 are active during
battery-backup mode unless disabled via the control register.
The device Time Stamps the switchover from VDD to VBAT and
VBAT to VDD, and the time is stored in tSV2B and tSB2V registers
respectively. If multiple VDD power-down sequences occur before
status is read, the earliest VDD to VBAT power-down time is stored
and the most recent VBAT to VDD time is stored.
Temperature conversion and compensation can be enabled in
battery-backup mode. Bit BTSE in the BETA register controls this
operation, as described in “BETA Register (BETA)” on page 18.
Power Failure Detection
The ISL12022 provides a Real Time Clock Failure Bit (RTCF) to
detect total power failure. It allows users to determine if the
device has powered up after having lost all power to the device
(both VDD and VBAT).
VBAT - VBATHYS
VBAT
VBAT + VBATHYS
BATTERY-BACKUP
MODE
VDD
VTRIP
2.2V
1.8V
FIGURE 12. BATTERY SWITCHOVER WHEN VBAT < VTRIP
FIGURE 13. BATTERY SWITCHOVER WHEN VBAT > VTRIP
VTRIP
VBAT
VTRIP + VTRIPHYS
BATTERY-BACKUP
MODE
VDD
VTRIP
3.0V
2.2V
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| ISL12022IBZ-T7A | 功能描述:實時時鐘 REAL TIME CLK/CLNDR W/TEMP COMP 8 L RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL12022M | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation, and Auto Daylight Saving |
| ISL12022M_09 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation, and Auto Daylight Saving |
| ISL12022M_10 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM,Integrated ±5ppm Temperature Compensation and Auto Daylight Saving |
| ISL12022MA | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving |
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