20 FN6667.5 December 13, 2011 ALPHA Register (ALPHA) The ALPHA variable is 8 bits and is defined as the temperature coefficient of cr" />
參數(shù)資料
型號： ISL12020MIRZ
廠商： Intersil
文件頁數(shù)： 13/34頁
文件大?。?/td> 0K
描述： IC RTC/CALENDAR TEMP SNSR 20-DFN
產(chǎn)品培訓(xùn)模塊： Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝： 53
類型： 時鐘/日歷
特點： 警報器，夏令時，閏年，SRAM
存儲容量： 128B
時間格式： HH:MM:SS（12/24 小時）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線串口
電源電壓： 2.7 V ~ 5.5 V
電壓 - 電源，電池： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-LFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 20-DFN（5.5x4.0）
包裝： 管件
產(chǎn)品目錄頁面： 1245 (CN2011-ZH PDF)
ISL12020M
20
FN6667.5
December 13, 2011
ALPHA Register (ALPHA)
The ALPHA variable is 8 bits and is defined as the temperature
coefficient of crystal from -40°C to T0, or the ALPHA Cold (there
is an Alpha Hot register that must be programmed as well). It is
normally given in units of ppm/°C2, with a typical value of -
0.034. The ISL12020M device uses a scaled version of the
absolute value of this coefficient in order to get an integer value.
Therefore, ALPHA<7:0> is defined as the (|Actual ALPHA Value| x
2048) and converted to binary. For example, a crystal with Alpha
of -0.034ppm/°C2 is first scaled (|2048*(-0.034)| = 70d) and
then converted to a binary number of 01000110b.
The practical range of Actual ALPHA values is from -0.020 to -
0.060.
The ISL12020M has a preset ALPHA value corresponding to the
crystal in the module. This value is recalled on initial power-up
and should remain unchanged for best compensation
performance, although the user can override this preset value if
so desired.
The ALPHA register should only be changed while the TSE (Temp
Sense Enable) bit is “0”. Note that both the ALPHA and the
ALPHA Hot registers need to be programmed with values for full
range temperature compensation.
BETA Register (BETA)
TEMPERATURE SENSOR ENABLED BIT (TSE)
This bit enables the Temperature Sensing operation, including the
temperature sensor, A/D converter and FATR/FDTR register
adjustment. The default mode after power-up is disabled (TSE = 0).
To enable the operation, TSE should be set to 1 (TSE = 1). When
temp sense is disabled, the initial values for IATR and IDTR registers
are used for frequency control.
All changes to the IDTR, IATR, ALPHA and BETA registers must be
made with TSE = 0. After loading the new values, TSE can be
enabled and the new values are used. When TSE is set to 1, the
temperature conversion cycle begins and will end when two
temperature conversions are completed. The average of the two
conversions is in the TEMP registers.
TEMP SENSOR CONVERSION IN BATTERY MODE BIT
(BTSE)
This bit enables the Temperature Sensing and Correction in battery
mode. BTSE = 0 (default) no conversion, Temp Sensing or
Compensation in battery mode. BTSE = 1 indicates Temp Sensing
and Compensation enabled in battery mode. The BTSE is disabled
when the battery voltage is lower than 2.7V. No temperature
compensation will take place with VBAT<2.7V.
10
1
0
-8
10
1
0
1
-9
10
1
0
1
0
-10
10
1
0
1
-11
10
1
0
-12
10
1
0
1
-13
10
1
0
-14
10
1
-15
11
0
-16
11
0
1
-17
11
0
1
0
-18
11
0
1
-19
11
0
1
0
-20
11
0
1
0
1
-21
11
0
1
0
-22
11
0
1
-23
11
1
0
-24
11
1
0
1
-25
11
1
0
1
0
-26
11
1
0
1
-27
11
1
0
-28
11
1
0
1
-29
11
1
0
-30
11
1
-31
TABLE 13. IATRO TRIMMING RANGE (Continued)
IATR05
IATR04
IATR03
IATR02
IATR01
IATR00
TRIMMING RANGE
TABLE 14. ALPHA REGISTER
ADDR
7
6
5
4
3
210
0Ch
D
ALPHA
6
ALPHA
5
ALPHA
4
ALPHA
3
ALPHA
2
ALPHA
1
ALPHA
0
TABLE 15.
ADDR
7
6
5
4
3
2
1
0
0Dh
TSE BTSE BTSR BETA4 BETA3 BETA2 BETA1 BETA0
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