參數(shù)資料
型號(hào): ISD5116EI
廠商: WINBOND ELECTRONICS CORP
元件分類(lèi): 音頻合成
英文描述: Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
中文描述: 960 SEC, SPEECH SYNTHESIZER WITH RCDG, PDSO28
封裝: 8 X 13.40 MM, PLASTIC, TSOP1-28
文件頁(yè)數(shù): 33/57頁(yè)
文件大?。?/td> 735K
代理商: ISD5116EI
October 2000
Page 32
RAC Waveform During Digital Erase
Sample Rate
t
RAC
t
RACL0
t
RACL1
4.0 kHz
2.5μs
0.5μs
2.0μs
5.3 kHz
1.87μs
0.37μs
1.50μs
6.4 kHz
1.56μs
0.31μs
1.25μs
8.0 kHz
1.25μs
0.25μs
1.00μs
INT (Interrupt)
INT is an open drain output pin. The ISD5116 interrupt pin goes LOW and stays LOW when an Overflow
(OVF) or End of Message (EOM) marker is detected. Each operation that ends in an EOM or OVF
generates an interrupt, including the message cueing cycles. The interrupt is cleared by a READ
STATUS instruction that will give a status byte out the SDA line.
XCLK (External Clock Input)
The external clock input for the ISD5116 product has an internal pull-down device. Normally, the ISD5116
is operated at one of four internal rates selected for its internal oscillator by the Sample Rate Select bits. If
greater precision is required, the device can be clocked through the XCLK pin at 4.096 MHz as described
in
Section 4.3
on page 22.
Because the anti-aliasing and smoothing filters track the Sample Rate Select bits, one must, for optimum
performance, maintain the external clock at 4.096 MHz
AND
set the Sample Rate Configuration bits to
one of the four values to properly set the filters to the correct cutoff frequency as described in
Section 4.3
on page 22. The duty cycle on the input clock is not critical, as the clock is immediately divided by two
internally. If the XCLK is not used, this input should be connected to V
SSD
.
External Clock Input Table
Required Clock
(kHz)
4096
4096
4096
4096
Duration
(Minutes)
8.73
10.9
13.1
17.5
Sample Rate
(kHz)
8.0
6.4
5.3
4.0
FLD1
FLD0
Filter Knee (kHz)
0
0
1
1
0
1
0
1
3.4
2.7
2.3
1.7
A0, A1 (Address Pins)
These two pins are normally strapped for the desired address that the ISD5116 will have on the I
2
C serial
interface. If there are four of these devices on the bus, then each must be strapped differently in order to
allow the Master device to address them individually. The possible addresses range from 80h to 87h,
depending upon whether the device is being written to, or read from, by the host. The ISD5116 has a 7-
bit slave address of which only A0 and A1 are pin programmable. The eighth bit (LSB) is the R/W bit.
Thus, the address will be 1000 0xy0 or 1000 0xy1. (See the
table in section 3.1.1
on page 9.)
.
25 μsec
1
.
25 μsec
相關(guān)PDF資料
PDF描述
ISD5116P Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
ISD5116S Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
ISD5116SD Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
ISD5116SI Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
ISD5116X Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
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ISD5116EYR 功能描述:IC VOICE REC/PLAY 8-16MN 28-TSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 語(yǔ)音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類(lèi)型:通孔 封裝/外殼:28-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5116P 功能描述:IC VOICE REC/PLAY 8-16MN 28-DIP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 語(yǔ)音錄制和重放 系列:ISD5100 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類(lèi)型:通孔 封裝/外殼:28-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000