
October 2000
Page 10
9. Slave responds with Lower Address byte of internal address register (A[4:0] will always return set to 0.)
10. Host sends a NO ACK to Slave, then executes I
2
C STOP
Note that the processor could have sent an I
2
C STOP after the Status Word data transfer and aborted the
transfer of the Address bytes.
A graphical representation of this operation is found below. See the caption box above for more
explanation.
2. LOAD COMMAND BYTE REGISTER (SINGLE BYTE LOAD): A single byte may be written to the
Command Byte Register in order to power up the device, start or stop Analog Record (if no address
information is needed), or do a Message Cueing function. The Command Byte Register is loaded as
follows:
1. Host executes I
2
C START
2. Send Slave Address with R/W bit = “0” (Write) [80h]
3. Slave responds back with an ACK.
4. Wait for SCL to go HIGH
5. Host sends a command byte to Slave
6. Slave responds with an ACK
7. Wait for SCL to go HIGH
8. Host executes I
2
C STOP
3. LOAD COMMAND BYTE REGISTER (ADDRESS LOAD): For the normal addressed mode the
Registers are loaded as follows:
1. Host executes I
2
C START
2. Send Slave Address with R/W bit = “0” (Write)
3. Slave responds back with an ACK.
4. Wait for SCL to go HIGH
5. Host sends a byte to Slave - (Command Byte)
6. Slave responds with an ACK
7. Wait for SCL to go HIGH
8. Host sends a byte to Slave - (High Address Byte)
9. Slave responds with an ACK
10. Wait for SCL to go HIGH
11. Host sends a byte to Slave - (Low Address Byte)
12. Slave responds with an ACK
13. Wait for SCL to go HIGH
14. Host executes I
2
C STOP
S
SLAVE ADDRESS
A
A
DATA
P
R
DATA
DATA
A
N
Status
High Addr.
Low Addr.
S
SLAVE ADDRESS
A
DATA
P
W
Command Byte
A
S
SLAVE ADDRESS
A
P
W
Command
DATA
A
DATA
A
DATA
A
High Addr.
Low Addr.