參數(shù)資料
型號(hào): IRMCS2011
廠商: International Rectifier
英文描述: Complete Encoder Based Servo Drive Design Platform iMOTION Development System
中文描述: 完整的編碼器的伺服驅(qū)動(dòng)器設(shè)計(jì)平臺(tái)iMotion的開(kāi)發(fā)系統(tǒng)
文件頁(yè)數(shù): 21/25頁(yè)
文件大?。?/td> 859K
代理商: IRMCS2011
REFERENCE DESIGN
IRMCS2011
9.3 Parallel Interface Port
IRMCS2011 provides an 8bit parallel interface port to facilitate microprocessor interface. Interface is generic and able
to interface most common 8bit parallel interface such as MCS8051, some Motorola 8bit uP, MicroChip, etc. Figure 16
shows the connection diagram. The connector, J5, is a 2-by-10 header connector pins.
Each signal is 3.3V level and data bus is multiplexed. Table 2 summarizes each signal definition.
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
20
NA
HP_nCS
HP_nWE
HP_Data7
HP_nOE
HP_A
NA
HP_Data5
HP_Data6
HP_Data0
HP_Data1
NA
NA
HP_Data3
HP_Data4
HP_Data2
J5
HDR2X10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
P
+3.3V_BB
Figure 16. Parallel Interface Port, J9
Signal
HP_nCS
HP_nOE
HP_nWE
HP_A
HP_Data
I/O
1
I
I
I
I
I/O
Table 2. Microprocessor Interface Module Signal Definitions
Description
Active low Host Port Chip Select
Active Low Host Port Output Enable
Active low Host Port Write Enable
Host Port Register Address. 1 = Address register, 0 = Data Register
Bidirectional Host Port data bus
Figure 17 and Figure 18 show detailed timing requirements for register read and write operations depending on the
type of microprocessor (Intel or Motorola type). All values are in nanoseconds. The data bus output is activated by
the logical combination (!nCS && !nOE && new), which allows read and write operations to be either nWe/nOE
(Intel) or nCS (Motorola) driven.
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