參數(shù)資料
型號(hào)： IQ80C52EXXX-12D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, CQFP44
封裝： CERAMIC, QFP-44
文件頁(yè)數(shù)： 47/108頁(yè)
文件大?。?/td> 3682K
代理商： IQ80C52EXXX-12D
43
8069R–AVR–06/2013
XMEGA A4
Not recommended for new designs -
Use XMEGA A4U series
26. DAC - 12-bit Digital to Analog Converter
26.1
Features
One DAC with 12-bit resolution
Up to 1 Msps conversion rate
Flexible conversion range
Multiple trigger sources
1 continuous output or 2 Sample and Hold (S/H) outputs
Built-in offset and gain calibration
High drive capabilities
Low Power Mode
26.2
Overview
The XMEGA A4 devices feature one 12-bit, 1 Msps DAC with built-in offset and gain calibration,
A DAC converts a digital value into an analog signal. The DAC may use an internal 1.0 voltage
as the upper limit for conversion, but it is also possible to use the supply voltage or any applied
voltage in-between. The external reference input is shared with the ADC reference input.
Figure 26-1.
DAC overview
The DAC has one continuous output with high drive capabilities for both resistive and capacitive
loads. It is also possible to split the continuous time channel into two Sample and Hold (S/H)
channels, each with separate data conversion registers.
A DAC conversion may be started from the application software by writing the data conversion
registers. The DAC can also be configured to do conversions triggered by the Event System to
have regular timing, independent of the application software. DMA may be used for transferring
data from memory locations to DAC data registers.
The DAC has a built-in calibration system to reduce offset and gain error when loading with a
calibration value from software.
PORTB has one DAC. Notation of this peripheral is DACB.
DAC
Channel A
Register
Channel B
Register
Event
Trigger
Configuration
Reference selection
Channel A
Channel B
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