參數(shù)資料
型號: IP101
英文描述: PHY 10/100M Single Chip Fast Ethernet Transceiver
中文描述: 單芯片物理層10/100M自適應(yīng)快速以太網(wǎng)收發(fā)器
文件頁數(shù): 14/33頁
文件大小: 821K
代理商: IP101
IP101
6.0 Register Descriptions
(continued)
Register 6 defines more auto-negotiation registers to meet the requirement.
Copyright
2003, IC Plus Corp.
Confidential, All rights reserved.
Advanced, Specification subject to change without notice.
14 / 33
IP101-DS-R0.02
Feb. 24, 2003
NOT APPROVED BY TECHNICAL DOCUMENT CONTROL
Register 6 : Auto-Negotiation Expansion Register
Address
Name
Description/Usage
Default value (h):
0000
15:5
Reserved
This bit is always set to 0.
4
MLF
This status indicates if a multiple link fault has occurred.
1 = fault occurred
0 = no fault occurred
0, RO
3
LP_NP_ABLE
This status indicates if the link partner supports Next Page
negotiation.
1 = supported
0 = not supported
0, RO
2
NP_ABLE
This bit indicates if the device is able to send additional Next
Pages.
0, RO
1
PAGE_RX
This bit will be set if a new link code word page has been
received. It is cleared automatically after the auto-negotiation
link partner’ s ability register (register 5) is read by the
management.
0, RO
0
LP_NW_ABLE 1 = link partner supports Nway auto-negotiation.
0, RO
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