參數(shù)資料
型號： IDT82P2828BH
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 34/154頁
文件大小： 0K
描述： IC LIU T1/J1/E1 28+1CH 640-PBGA
標準包裝： 5
類型： 線路接口裝置（LIU）
規(guī)程： E1
電源電壓： 3.13 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應商設備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
其它名稱： 82P2828BH
IDT82P2828
28(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Physical And Electrical Specifications
129
February 6, 2009
8.6
E1 RECEIVER ELECTRICAL CHARACTERISTICS
Parameter
Min
Typ.
Max
Unit
Test Conditions
Receiver Sensitivity of Receive Differen-
tial mode with Cable Loss @ 1024 KHz
15
dB
with Nominal Pulse Amplitude of 3.0 V for 120
and 2.37 V for 75
termination, adding -18 dB
interference signal.
Receiver Sensitivity of Receive Single
Ended mode with Cable Loss @ 1024
kHz
12
dB
Signal to Noise Interference Margin
-14
dB
@cable loss 0-6 dB
Analog LOS Level
(Normal Mode)
ALOS[2:0]
000
001 (default)
010
011
100
101
110
111
0.5
0.7
0.9
1.2
1.4
1.6
1.8
2.0
Vpp
In Differential mode, measured between RTIP and
RRING pins.
In Singled Ended mode, measured between RTIP
and GNDA pins
Refer to Table-17 for LLOS Criteria Declare and
Clear.
LOS hysteresis
0.25
Analog LOS Level
(Line Monitor Mode)
ALOS[2:0]
000
001 (default)
010
011
1xx (reserved)
1.0
1.4
1.8
2.2
Vpp
Measured on the line with the monitor gain set by
the MG[1:0] bits
(b1~0, RCF2,...) equal to the
resistive attenuation. Refer to Table-17 for LLOS
Criteria Declare and Clear.
LOS hysteresis
0.41
Allowable Consecutive Zeros before LOS:
G.775
I.431 / ETSI300233
32
2048
LOS Reset
12.5
% ones
G.775, ETSI 300233
Receive Intrinsic Jitter
0.05
U.I.
JA disabled; wide band
Input Jitter Tolerance:
1 Hz ~ 20 Hz
20 Hz ~ 2.4 KHz
18 KHz ~ 100 KHz
37
5
2
U.I.
G.823, with 6 dB Cable Attenuation
Receiver Differential Input Impedance
2.6
K
@1024 KHz; Rx port is high-Z
Receiver Common Mode Input Imped-
ance to GND
1.6
K
Receiver Single Ended mode Input
Impedance to GND
3.1
K
The RRINGn pins are open.
Receive Return Loss:
51 KHz ~ 102 KHz
102 KHz ~ 2.048 MHz
2.048 MHz ~ 3.072 MHz
12
18
14
dB
G.703
Receive Path Delay:
Single Rail
Dual Rail NRZ
Dual Rail RZ
6.6
1.8
1.5
U.I.
JA Disabled
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