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參數(shù)資料
| 型號： | IDT70125S45J |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| 中文描述： | 2K X 9 DUAL-PORT SRAM, 45 ns, PQCC52 |
| 封裝： | 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 168K |
| 代理商： | IDT70125S45J |
6.10
4
IDT 70121/70125S/L
HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT
COMMERCIAL TEMPERATURE RANGE
DATA RETENTION CHARACTERISTICS
(L Version Only)
70121L/70125L
Min.
Typ.
(1)
2
—
100
0
t
RC(2)
Symbol
V
DR
I
CCDR
t
CDR(3)
t
R(3)
Parameter
Test Condition
Max.
—
1500
—
—
Unit
V
μ
A
ns
ns
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data Retention Time
Operation Recovery Time
—
V
CC
= 2.0V,
CE
≥
V
CC
– 0.2V
V
IN
≥
V
CC
– 0.2V or V
IN
≤
0.2V
Com’l.
—
—
NOTES:
1. V
CC
= 2V, T
A
= +25
°
C, and are not production tested.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization but is not production tested.
2654 tbl 06
DATA RETENTION WAVEFORM
V
DR
2V
≥
DATA RETENTION MODE
Vcc
CE
4.5V
t
CDR
t
R
V
IH
V
DR
V
IH
4.5V
2654 drw 03
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(3)
70121X25
70125X25
Min. Max. Min. Max. Min. Max. Min. Max
.
Unit
70121X35
70125X35
70121X45
70125X45
70121X55
70125X55
Symbol
Read Cycle
t
RC
t
AA
t
ACE
t
AOE
t
OH
t
LZ
t
HZ
t
PU
t
PD
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Output Hold from Address Change
Output Low-Z Time
(1,2)
Output High-Z Time
(1,2)
Chip Enable to Power-Up Time
(2)
Chip Disable to Power-Down Time
(2)
25
—
—
—
0
0
—
0
—
—
25
25
12
—
—
10
—
50
35
—
—
—
0
0
—
0
—
—
35
35
25
—
—
15
—
50
45
—
—
—
0
0
—
0
—
—
45
45
30
—
—
20
—
50
55
—
—
—
0
0
—
0
—
—
55
55
35
—
—
30
—
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. Transition is measured
±
500mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter guaranteed by device characterization, but is not production tested.
3. “X” in part numbers indicates power rating (S or L).
2654 tbl 08
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
Figures 1 and 2
2654 tbl 07
1250
30pF
775
DATA
OUT
BUSY
INT
5V
5V
1250
5pF
775
DATA
OUT
2654 drw 04
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(
For t
LZ,
t
HZ,
t
WZ,
t
OW)
Including scope and jig.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT70125S45JG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S45JGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT |
| IDT70125S45L52 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
| IDT70125S45L52B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
| IDT70125S55J | 功能描述:IC SRAM 18KBIT 55NS 52PLCC RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:MoBL® 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:16M（2M x 8，1M x 16） 速度:45ns 接口:并聯(lián) 電源電壓:2.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFBGA 供應(yīng)商設(shè)備封裝:48-VFBGA（6x8） 包裝:帶卷 (TR) |
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