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參數資料
| 型號： | IDT7007L35PFB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-80 |
| 文件頁數： | 8/21頁 |
| 文件大?。?/td> | 257K |
| 代理商： | IDT7007L35PFB |
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
8
NOTES:
1. Transition is measured ±200mV from Low- or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM,
CE
= V
IL
and
SEM
= V
IH
. To access semaphore,
CE
= V
IH
and
SEM
= V
IL
.
4. 'X' in part numbers indicates power rating (S or L).
5. Industrial temperature: for other speeds, packages and powers contact your sales office.
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
(4,5)
AC Test Conditions
Figure 2. Output Test Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
* Including scope and jig.
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1 and 2
2940 tbl 11
Figure 1. AC Output Test Load
2940 drw 06
893
30pF
347
5V
DATA
OUT
BUSY
INT
893
5pF*
347
5V
DATA
OUT
2940 drw 05
.
7007X15
Com'l Only
7007X20
Com'l Only
7007X25 Com'l
& Military
Unit
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
READ CYCLE
t
RC
Read Cycle Time
15
____
20
____
25
____
ns
t
AA
Address Access Time
____
15
____
20
____
25
ns
t
ACE
Chip Enable Access Time
(3)
____
15
____
20
____
25
ns
t
AOE
Output Enable Access Time
____
10
____
12
____
13
ns
t
OH
Output Hold from Address Change
3
____
3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
10
____
12
____
15
ns
t
PU
Chip Enable to Power Up Time
(2)
0
____
0
____
0
____
ns
t
PD
Chip Disable to Power Down Time
(2)
____
15
____
20
____
25
ns
t
SOP
Semaphore Flag Update Pulse (
OE
or
SEM
)
10
____
10
____
12
____
ns
t
SAA
Semaphore Address Access Time
____
15
____
20
____
25
ns
2940 tbl 12a
7007X35
Com'l &
Military
7007X55
Com'l, Ind
& Military
Unit
Symbol
Parameter
Min.
Max.
Min.
Max.
READ CYCLE
t
RC
Read Cycle Time
35
____
55
____
ns
t
AA
Address Access Time
____
35
____
55
ns
t
ACE
Chip Enable Access Time
(3)
____
35
____
55
ns
t
AOE
Output Enable Access Time
____
20
____
30
ns
t
OH
Output Hold from Address Change
3
____
3
____
ns
t
LZ
Output Low-Z Time
(1,2)
3
____
3
____
ns
t
HZ
Output High-Z Time
(1,2)
____
15
____
25
ns
t
PU
Chip Enable to Power Up Time
(2)
0
____
0
____
ns
t
PD
Chip Disable to Power Down Time
(2)
____
35
____
50
ns
t
SOP
Semaphore Flag Update Pulse (
OE
or
SEM
)
15
____
15
____
ns
t
SAA
Semaphore Address Access Time
____
35
____
55
ns
2940 tbl 12b
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相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT7007L35PFI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM |
| IDT7007L45G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7007L45GB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7007L45J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7007L45PF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
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