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參數(shù)資料
| 型號： | IDT7007L35PFB |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-80 |
| 文件頁數(shù)： | 12/21頁 |
| 文件大小： | 257K |
| 代理商： | IDT7007L35PFB |
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
12
Timing Waveform of Semaphore Read after Write Timing, Either Side
(1)
NOTES:
1. D
OR
= D
OL
= V
IL
,
CE
R
=
CE
L
= V
IH
.
2. All timing is the same for left and right ports. Port "A" may be either left or right port. "B" is the opposite from port "A".
3. This parameter is measured from R/
W
A
or
SEM
A
going HIGH to R/
W
B
or
SEM
B
going HIGH.
4. If t
SPS
is not satisfied, the semaphore will fall positively to one side or the other, but there is no guarantee which side will obtain the flag.
Timing Waveform of Semaphore Write Contention
(1,3,4)
NOTE:
1.
CE
= V
IH
for the duration of the above timing (both write and read cycle).
SEM
2940 drw 11
t
AW
t
EW
t
SOP
DATA
0
VALID ADDRESS
t
SAA
R/
W
t
WR
t
OH
t
ACE
VALID ADDRESS
DATA
IN
VALID
DATA
OUT
VALID
t
DW
t
WP
t
DH
t
AS
t
SWRD
t
AOE
t
SOP
Read Cycle
Write Cycle
A
0
-A
2
OE
SEM
"A"
2940 drw 12
t
SPS
MATCH
R/
W
"A"
MATCH
A
0"A"
-A
2"A"
SIDE
"A"
(2)
SEM
"B"
R/
W
"B"
A
0"B"
-A
2"B"
SIDE
"B"
(2)
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相關代理商/技術參數(shù) |
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|---|---|
| IDT7007L35PFI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM |
| IDT7007L45G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7007L45GB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7007L45J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
| IDT7007L45PF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Dual-Port SRAM |
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