參數(shù)資料
型號: IDT5V9352PRI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 3.3V/2.5V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
中文描述: PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: TQFP-32
文件頁數(shù): 2/10頁
文件大?。?/td> 81K
代理商: IDT5V9352PRI
2
INDUSTRIAL TEMPERATURE RANGE
IDT5V9352
3.3V/2.5V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
PIN CONFIGURATION
TQFP
TOP VIEW
V
C
Q
B
2
Q
B
3
G
Q
C
0
Q
C
1
V
C
G
V
C
Q
A
2
Q
A
1
G
Q
A
0
V
C
V
C
P
VCO_
SEL
f
SELC
f
SELB
f
SELA
MR/OE
REFCLK
GND
FBIN
GND
Q
B
1
Q
B
0
V
CC
V
CC
Q
A
4
Q
A
3
GND
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
NOTE:
1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. These are stress rating only, and functional
operation of the device at these or any other conditions beyond those indicated
under “recommended operating conditions” is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability.
ABSOLUTE MAX IMUM RATINGS
(1)
Symbol
Rating
V
CC
Supply Voltage Range
V
I
Input Voltage Range
I
IN
Input Current
I
OUT
DC Output Current
T
STG
Storage Temperature Range
Max.
Unit
V
V
mA
mA
°C
–0.3 to +3.6
–0.3 to V
CC
+0.3
±20
±50
–65 to +125
CAPACITANCE
Parameter
C
IN
C
PD
Description
Input Capacitance
Power Dissipation
Capacitance
Min.
Typ.
4
10
Max.
Unit
pF
pF
Symbol
Description
Min.
Typ.
Max. Unit
V
TT
Output Termnation Voltage
V
CC
/2
V
HBM
ESD Protection (human body model)
2000
V
LU
Latch-Up Immunity
200
mA
GENERAL SPECIFICATIONS
NOTES:
1. IDT5V9352 requires an external RC filter for the analog power supply pin V
CCA
.
2. For V
CC
= 2.5V, R
F
= 9-10
, C
F
= 22
μ
F.
For V
CC
= 3.3V, R
F
= 5-15
, C
F
= 22
μ
F.
LOGIC DIAGRAM
(1,2)
R
F
V
CC
C
F
V
CCA
V
CC
10nF
33...100nF
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