- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377124 > ICSSSTUB32864Az(LF)T (Integrated Device Technology, Inc.) 25-Bit Configurable Registered Buffer for DDR2 PDF資料下載
參數(shù)資料
| 型號(hào)： | ICSSSTUB32864Az(LF)T |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 25-Bit Configurable Registered Buffer for DDR2 |
| 中文描述： | 25位可配置的注冊(cè)緩沖DDR2內(nèi)存 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 152K |
| 代理商： | ICSSSTUB32864AZ(LF)T |
ICSSSTUB32864A
Advance Information
1166—10/05/05
7
Electrical Characteristics - DC
T
A
= 0 - 70°C; V
DD
= 1.8 +/-0.1V (unless otherwise stated)
SYMBOL
PARAMETERS
V
IK
V
OH
V
OL
I
I
All Inputs
Standby (Static)
I
DD
V
DD
MIN
TYP
MAX
-1.2
UNITS
I
I
= -18mA
I
OH
= -6mA
I
OL
= 6mA
V
I
= V
DD
or GND
RESET# = GND
V
I
= V
IH(AC)
or V
IL(AC)
,
RESET# = V
DD
RESET# = V
DD
,
V
I
= V
IH(AC)
or V
IL(AC)
,
CLK and CLK# switching
50% duty cycle.
RESET# = V
DD
,
V
I
= V
IH(AC)
or V
IL (AC)
,
CLK and CLK# switching
50% duty cycle. One data
input switching at half
clock frequency, 50%
duty cycle
V
I
= V
REF
±350mV
V
ICR
= 1.25V, V
I(PP)
= 360mV
1.7V
1.7V
1.9V
1.2
0.5
5
100
-5
μA
μA
Operating (Static)
40
mA
Dynamic operating
(clock only)
39
μ/clock
MHz
Dynamic Operating
(per each data input)
1:1 mode
19
Dynamic Operating
(per each data input)
1:2 mode
Data Inputs
CLK and CLK#
RESET#
35
2.5
2
3.5
3
2.5
Notes:
1 - Guaranteed by design, not 100% tested in production.
C
i
V
I
= V
DD
or GND
I
DDD
I
O
= 0
CONDITIONS
pF
μA/ clock
MHz/data
V
1.9V
1.8V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICT49FCT3805APY | 3.3V CMOS BUFFER/CLOCK DRIVER |
| ICT49FCT3805APYG | 3.3V CMOS BUFFER/CLOCK DRIVER |
| ICT49FCT3805APYGI | 3.3V CMOS BUFFER/CLOCK DRIVER |
| ICT49FCT3805APYI | 3.3V CMOS BUFFER/CLOCK DRIVER |
| ICT49FCT3805AQ | 3.3V CMOS BUFFER/CLOCK DRIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICSSSTUB32866B | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUB32866BZ(LF)T | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUB32871A | 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32871AZLFT | 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32871AZT | 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。