參數資料
型號: ICSSSTUB32864Az(LF)T
廠商: Integrated Device Technology, Inc.
英文描述: 25-Bit Configurable Registered Buffer for DDR2
中文描述: 25位可配置的注冊緩沖DDR2內存
文件頁數: 11/12頁
文件大?。?/td> 152K
代理商: ICSSSTUB32864AZ(LF)T
ICSSSTUB32864A
Advance Information
1166—10/05/05
11
Ordering Information
ICSSSTUB32864Az(LF)T
Example:
ICS XXXX
y
z (LF) - T
- e -
TYP
b
REF
not used)
Alpha Designations
for Vertical Grid
(Letters I, O, Q & S
for Horizontal Grid
Numeric Designations
h
TYP
c
REF
D
A
B
C
TOP VIEW
A1
4 3 2 1
Plane
Seating
C
T
0.12 C
d TYP
E
D
D1
- e -
E1
TYP
D
E
T
e
HORIZ
6
6
VERT
16
16
TOTAL
96
96
d
h
b
c
Min/Max
1.30/1.50
/1.2
Min/Max
0.40/0.50
0.38/0.48
Min/Max
0.25/0.41
0.27/0.37
13.50 Bsc
11.50 Bsc
Note: Ball grid total indicates maximum ball count for package. Lesser quantity may be used.
5.50 Bsc
5.00 Bsc
0.80 Bsc
0.65 Bsc
0.75
0.875
0.75
0.875
MO-205
10-0055C
ALL DIMENSIONS IN MILLIMETERS
REF. DIMENSIONS
----- BALL GRID ----- Max.
* Source Ref.: JEDEC Publication 95,
Designation for tape and reel packaging
Lead Free, RoHS Compliant (Optional)
Package Type
H = LFBGA (standard size: 5.5 x 13.50)
HM = TFBGA (reduced size: 5.0 x 11.50)
Revision Designator
(will not correlate with datasheet revision)
Device Type
Prefix
ICS = Standard Device
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