參數(shù)資料
型號： ICS950227
英文描述： Programmable Timing Control Hub for P4
中文描述： 可編程定時控制中心，為小
文件頁數(shù)： 7/17頁
文件大小： 128K
代理商： ICS950227
7
Integrated
Circuit
Systems, Inc.
ICS950227
0641D—07/03/03
I
2
C Table: Byte Count Register
Byte 8
Pin #
Name
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
Control Function
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
PWD
0
0
0
0
1
1
1
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
I
2
C Table: Watchdog Timer Register
Byte 9
-
-
Pin #
Name
RESERVED
RESERVED
RESERVED
WD4
WD3
WD2
WD1
Control Function
RESERVED
RESERVED
RESERVED
These bits represent
X*290ms the watchdog
timer will wait before it
goes to alarm mode.
Default is10X 290ms
=2.9seconds
Type
RW
RW
RW
RW
RW
RW
RW
0
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
PWD
0
0
0
0
1
0
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WD0
RW
-
-
0
I
2
C Table: VCO Control Select Bit & WD Timer Control Register
Bit 6
WDEN
Watchdog Enable
WD Safe Frequency
Mode
RW
OFF
Latched
FS/Byte0
ON
0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WD SS EN
WD MultSEL
WD FS2
WD FS1
WD FS0
RW
RW
RW
RW
RW
-
-
-
-
-
-
-
-
-
-
0
0
0
0
0
I
2
C Table: VCO Frequency Control Register
Pin #
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
Name
N Div8
M Div6
M Div5
M Div4
M Div3
M Div2
M Div1
M Div0
Control Function
N Divider Bit 8
The decimal
representation of M Div
(6:0) is equal to
reference divider value.
Default at power up =
latch-in or Byte 0 Rom
table.
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
PWD
X
X
X
X
X
X
X
X
-
-
-
-
-
-
0
-
-
-
-
-
Writing to these bit will
configure the safe
frequency configuration
RW
WD B10
b(4:0)
-
Bit 5
-
WDFSEN
RW
Latched
Input
IIC Prog.
B(11:17)
0
Bit 7
-
M/NEN
M/N Programming
Enable
Type
0
1
PWD
Byte 10
Pin #
Name
Control Function
-
-
-
-
Writing to this register
will configure how
many bytes will be read
back, default is 0F
= 15
bytes.
-
-
-
-
-
-
-
-
-
Byte 11
-
-
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