參數資料
型號: ICS950227
英文描述: Programmable Timing Control Hub for P4
中文描述: 可編程定時控制中心,為小
文件頁數: 5/17頁
文件大?。?/td> 128K
代理商: ICS950227
5
Integrated
Circuit
Systems, Inc.
ICS950227
0641D—07/03/03
I
2
C Table: Frequency Select Register
Byte 0
Pin #
Name
Control Function
Frequency H/W IIC
Select
CENTER/DOWNSPRE
AD SELECT
Type
0
1
PWD
Bit 7
SPREAD ENABLE
RW
OFF
ON
0
Bit 6
CENTER/DOWNSP
READ SELECT
3V66/VCH SELECT 48MHz/66.66MHz SEL
RW
DOWN
SPREAD
66.66MHz
CENTER
SPREAD
48.00MHz
0
Bit 5
RW
0
Bit 4
CPU_STOP#
CPU STOP Read Back
R
X
Bit 3
PCI_STOP#
HW/SW SELECT
Freq Select Bit 3
RW/R
PCI STOP
PCI
RUNNING
1
Bit 2
FS2
Freq Select 2 Read
Back
Freq Select 1 Read
Back
Freq Select 0 Read
Back
R
X
Bit 1
FS1
R
X
Bit 0
FS0
R
X
I
2
C Table: Spreading and Device Behavior Control Register
Pin #
Byte 1
Name
Control Function
MULTSEL0
READBACK
Watchdog Alarm Read
Back
Type
0
1
PWD
Bit 7
MULTSEL0
R
X
Bit 6
WD ALARM
R
NO ALARM
ALARM SET
0
Bit 5
CPU2/CPUC2
RW
STOPPABLE FREE-RUN
0
Bit 4
CPU1/CPUC1
RW
STOPPABLE FREE-RUN
0
Bit 3
CPU0/CPUC0
RW
STOPPABLE FREE-RUN
0
Bit 2
Bit 1
Bit 0
CPU2/CPUC2
CPU1/CPUC1
CPU0/CPUC0
Output Control
Output Control
Output Control
RW
RW
RW
Disable
Disable
Disable
Enable
Enable
Enable
1
1
1
I
2
C Table: Output Control Register
Byte 2
-
18
Pin #
Name
Reserved
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
Control Function
Reserved
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Output Control
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
-
1
-
PWD
0
1
1
1
1
1
1
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
I
2
C Table: Output Control Register
Byte 3
38
39
Pin #
Name
Control Function
Output Control
Output Control
Type
RW
RW
0
1
PWD
1
1
Bit 7
Bit 6
48MHz_DOT
48MHz_USB
Disable
Disable
Enable
Enable
Bit 5
PCIF2
RW
FREE-RUN STOPPABLE
0
Bit 4
PCIF1
RW
FREE-RUN STOPPABLE
0
Bit 3
PCIF0
RW
FREE-RUN STOPPABLE
0
Bit 2
Bit 1
Bit 0
PCICLK_F2
PCICLK_F1
PCICLK_F0
Output Control
Output Control
Output Control
RW
RW
RW
Disable
Disable
Disable
Enable
Enable
Enable
1
1
1
5
7
6
5
READBACK
43
READBACK
53
34
40
55
54
READBACK
-
-
35
-
45, 44
49, 48
52, 51
17
16
13
12
11
10
45, 44
49, 48
52, 51
6
7
CPU FREE-RUN NING
CONTROL
CPU FREE-RUN NING
CONTROL
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