- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360785 > ICS950104 Programmable System Clock Chip for PIII Processor PDF資料下載
參數(shù)資料
| 型號(hào)： | ICS950104 |
| 英文描述： | Programmable System Clock Chip for PIII Processor |
| 中文描述： | 可編程系統(tǒng)時(shí)鐘芯片的PIII處理器 |
| 文件頁(yè)數(shù)： | 2/19頁(yè) |
| 文件大?。?/td> | 222K |
| 代理商： | ICS950104 |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)
2
ICS950104
Advance Information
Third party brands and names are the property of their respective owners.
Pin Descriptions
Notes:
1:
2:
Internal Pull-up Resistor of 120K to 3.3V on indicated inputs
Bidirectional input/output pins, input logic levels are latched at internal power-on-reset. Use 10Kohm resistor
to program logic Hi to VDD or GND for logic low.
Internal Pull-down resistor of 120K to GND on indicated inputs.
3:
PIN NUMBER
PIN NAME
TYPE
DESCRIPTION
1
CPUCLKC0
OUT
"Complementary" clocks of differential pair CPU outputs. These clocks are 180
°
out of phase with SDRAM clocks. These open drain outputs need an external
1.5V pull-up.
2
CPUCLKT0
OUT
"True" clocks of differential pair CPU outputs. These clocks are in phase with
SDRAM clocks. These open drain outputs need an external 1.5V pull-up.
3, 9, 18, 30, 37
4, 12, 17, 25, 31,
36, 46, 48
5, 22
6
7
VDD
PWR
Power supply pins, nominal 3.3V
GND
PWR
Ground pins
AVDD
X1
X2
FS0
2, 3
REF0
FS1
2, 3
REF1
REF2
FS2
1, 3
PCICLK_F
PWR
IN
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
Analog power supply for 3.3V
Crystal input,nominally 14.318MHz.
Crystal output, nominally 14.318MHz.
Frequency select pin.
14.318 MHz reference clock.
Frequency select pin.
14.318 MHz reference clock.
14.318 MHz reference clock.
Frequency select pin.
Free running PCICLK not stoped by PCI_STOP#
11
21, 20, 19, 16, 15,
14
PCICLK(5:0)
OUT
PCI clock outputs.
MULTSEL
2, 3
24_48MHz
FS3
2, 3
48MHz
SCLK
IN
OUT
IN
OUT
IN
3.3V LVTTL input for selecting the current multiplier for CPU outputs.
Selectable 48 or 24MHz output
Frequency select pin.
48MHz output clock
Clock input of I
2
C input, 5V tolerant input
Asynchronous active low input pin used to power down the device into a low
power state. The internal clocks are disabled and the VCO and the crystal are
stopped. The latency of the power down will not be greater than 3ms. This pin
will be activiated when
26
PD#
1
IN
VttPWRGD#
IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when FS
and MULTISEL0 inputs are valid and are ready to be sampled (active low)
28
CPU_STOP#
1
IN
This asynchronous input halts CPU, SDRAM, and AGP clocks at logic "0" level
when driven low, the stop selection can be programmed through I
2
C.
29
PCI_STOP#
1
IN
Stops all PCICLKsbesides the PCICLK_F clocks at logic 0 level,
when input low
32, 33, 34, 35, 38,
39, 40, 41
SDRAM ( 7:0 )
OUT
SDRAM clock outputs.
42
SDRAM_STOP#
1
IN
Stops all SDRAMs besides the SDRAM_F clocks at logic 0 level, when input
low
Data input for I
2
C serial input, 5V tolerant input
Power supply pins, nominal 2.5V
2.5V CPU clock
This pin establishes the reference current for the CPUCLK pairs. This
pin requires a fixed precision resistor tied to ground in order to establish
the appropriate current.
43
44
45
SDATA
VDDL
CPUCLK
IN
PWR
OUT
47
I REF
OUT
23
27
10
8
13
24
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS950202 | Programmable Timing Control HubTM for P4TM |
| ICS950208 | Programmable Timing Control Hub for P4 |
| ICS950211 | Programmable Timing Control Hub for P4 |
| ICS950211YFLF-T | Programmable Timing Control Hub for P4 |
| ICS950211YGLF-T | Programmable Timing Control Hub for P4 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS950104YFT | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable System Clock Chip for PIII Processor |
| ICS950201 | 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for P4⑩ |
| ICS950201AFLF | 功能描述:IC TIMING CTRL HUB P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/頻率發(fā)生器，多路復(fù)用器 PLL:是 主要目的:存儲(chǔ)器，RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6 |
| ICS950201AFLFT | 功能描述:IC TIMING CTRL HUB P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:TCH™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
| ICS950201AFT-IB0 | 制造商:Ics 功能描述:ELECTRONIC COMPONENT 制造商:Integrated Device Technology Inc 功能描述:ELECTRONIC COMPONENT |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。