參數(shù)資料
型號: ICS8S89834AKILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 4/17頁
文件大小: 0K
描述: IC CLOCK MUX 2:4 1GHZ 16-VFQFN
標準包裝: 100
系列: HiPerClockS™
類型: 多路復用器
電路數(shù): 1
比率 - 輸入:輸出: 2:4
差分 - 輸入:輸出: 無/是
輸入: LVCMOS,LVTTL
輸出: ECL,LVPECL
頻率 - 最大: 1GHz
電源電壓: 2.375 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應商設(shè)備封裝: 16-VFQFPN(3x3)
包裝: 托盤
ICS8S89834I Data Sheet
LOW SKEW, 2-TO-4 LVCMOS/LVTTL-TO-LVPECL/ECL CLOCK MULTIPLEXER
ICS8S89834AKI REVISION A FEBRUARY 4, 2010
12
2010 Integrated Device Technology, Inc.
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8S89834I.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS8S89834I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.63V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.63V * 52mA = 188.76mW
Power (outputs)MAX = 32mW w/Loaded Output pair
If all outputs are loaded, the total power is 4 * 32mW = 128mW
Total Power_MAX = (3.63V, with all outputs switching) = 188.76mW + 128mW = 316.76mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 74.7°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.317W * 74.7°C/W = 108.7°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance θJA for 16 Lead VFQFN, Forced Convection
θ
JA vs. Air Flow
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
74.7°C/W
65.3°C/W
58.5°C/W
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