參數(shù)資料
型號: ICS853S011BGILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 6/20頁
文件大?。?/td> 0K
描述: IC CLK BUFFER 1:2 2.5GHZ 8-TSSOP
標準包裝: 96
系列: HiPerClockS™
類型: 扇出緩沖器(分配)
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 是/是
輸入: CML,LVDS,LVPECL,SSTL
輸出: ECL,LVPECL
頻率 - 最大: 2.5GHz
電源電壓: 2.375 V ~ 3.8 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-TSSOP
包裝: 管件
其它名稱: 800-2237
ICS853S011BGILF-ND
ICS853S011BGI REVISION A MAY 12, 2010
14
2010 Integrated Device Technology, Inc.
ICS853S011BI Data Sheet
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS853S011BI.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS853S011BI is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC= 3.8V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.8V * 25mA = 95mW
Power (outputs)MAX = 29.86mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 29.86mW = 59.72mW
Total Power_MAX (3.3V, with all outputs switching) = 95mW + 59.72mW = 154.72mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 145.4°C/W per Table 5A below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.155W * 145.4°C/W = 107.5°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 5A. Thermal Resitance θJA for 8 Lead TSSOP, Forced Convection
Table 5A. Thermal Resitance θJA for 8 Lead SOIC, Forced Convection
θ
JA vs. Air Flow
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
145.4°C/W
141.3°C/W
139.3°C/W
θ
JA vs. Air Flow
Meters per Second
01
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
102.0°C/W
95.0°C/W
90.6°C/W
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