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參數(shù)資料
| 型號： | ICS2572N |
| 英文描述： | User-Programmable Dual High-Performance Clock Generator |
| 中文描述： | 用戶可編程雙路高性能時鐘發(fā)生器 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 144K |
| 代理商： | ICS2572N |
External Reference Sources
An external frequency source may be used as the reference for
the VCLK and MCLK PLLs. To implement this, simply con-
nect the reference frequency source to the XTAL1 pin of the
ICS2572. For best results, insure that the clock edges are as
clean and fast as possible and that the input voltage thresholds
are not violated.
Power Supply
The ICS2572 has two VSS pins to reduce the effects of package
inductance. Both pins are connected to the same potential on
the die (the ground bus). BOTH of these pins should connect
to the ground plane of the video board as close to the package
as is possible.
The ICS2572 has a VDD pin which is the supply of +5 volt
power to all output stages. This pin should be connected to the
power plane (or bus) using standard high-frequency decou-
pling practice. That is, use low-capacitors should have low
series inductance and be mounted close to the ICS2572.
The VAA pin is the power supply for the synthesizer circuitry
and other lower current digital functions. We recommend that
RC decoupling or zener regulation be provided for this pin (as
shown in the recommended application circuitry). This will
allow the PLL to “track” through power supply fluctuations
without visible effects.
ICS2572
E-100
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS2595M-S04 | Video/Graphics Clock Generator |
| ICS2595N-S02 | Video/Graphics Clock Generator |
| ICS2595N-S04 | Video/Graphics Clock Generator |
| ICS2572M-A01 | Peripheral IC |
| ICS2572M-AXX | Peripheral IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS2572N-A01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| ICS2572N-AXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| ICS2572N-B01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| ICS2572N-BXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| ICS2572N-C01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
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