參數(shù)資料
型號(hào)： ICS1889
英文描述： 100Base-FX Integrated PHYceiverTM
中文描述： 100Base - FX光纖綜合PHYceiverTM
文件頁數(shù)： 9/35頁
文件大?。?/td> 1096K
代理商： ICS1889
9
ICS1889
Isolate (bit 10)
Setting this bit to a logic one causes the
ICS1889
to isolate its
data paths from the MII. In this mode, sourced signals
(TXCLK, RXCLK, RXDV, RXER, RXD0-3, COL and CRS)
are in a high impedance state and input signals (TXD0-3,
TXEN and TXER) are ignored. The management interface is
unaffected by this command.
When the PHY address is set to 0, the device will power-up in
the isolated mode (bit 10=1). For all other addresses, the
default will be bit 10=0.
Restart Auto-Negotiation (bit 9)
This feature is not available with fiber optic solutions. This
bit is permanently set to a logic zero indicating that it is not
supported.
Duplex Mode (bit 8)
Setting this bit to a logic one causes the
ICS1889
to operate in
the full duplex mode and setting this bit to a logic zero causes
it to operate in the half duplex mode. If the
ICS1889
is
operating in loop back mode, this bit will have no effect on
the operation.
Collision Test (bit 7)
This command bit is used to test that the collision circuitry is
working when the
ICS1889
is operating in the loop back
mode. Setting this bit to a logic one causes the
ICS1889
to
assert the collision signal within 512 bit times of TXEN being
asserted and to de-assert it within 4-bit times of TXEN being
de-asserted. Setting this bit to a logic zero causes the
ICS1889
to operate in the normal mode.
Reserved (Bits 6 through 0)
These bits are reserved for future IEEE standards. When read,
logic zeroes are returned. Writing has no effect on
ICS1889
operation.
相關(guān)PDF資料
PDF描述
ICS1892 10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y 10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-10 10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-14 10Base-T/100Base-TX Integrated PHYceiver
ICS1893AF 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS1890 制造商:ICS 制造商全稱:ICS 功能描述:Auto-Negotiation Advertisement Register (register 4 [0x04])
ICS1890Y 制造商:ICS 功能描述: 制造商:ICS 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:ICS 功能描述:1890Y-4 制造商:Integrated Device Technology Inc 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP
ICS1890Y-14 制造商:ICS 制造商全稱:ICS 功能描述:Auto-Negotiation Advertisement Register (register 4 [0x04])
ICS1890Y-4 制造商:ICS 功能描述:1890Y-4
ICS1891 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Transceiver
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