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參數(shù)資料
| 型號： | I5116X |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| 中文描述： | 960 SEC, SPEECH SYNTHESIZER WITH RCDG, UUC25 |
| 封裝： | DIE-25 |
| 文件頁數(shù)： | 13/88頁 |
| 文件大?。?/td> | 612K |
| 代理商： | I5116X |
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ISD5100 – SERIES
Publication Release Date: October, 2003
- 13 -
Revision 0.2
Pinout Table
A1 A0
Slave
Address
R/W
Bit
HEX Value
0
0
<100 0000>
0
80
0
1
<100 0001>
0
82
1
0
<100 0010>
0
84
1
1
<100 0011>
0
86
0
0
<100 0000>
1
81
0
1
<100 0001>
1
83
1
0
<100 0010>
1
85
1
1
<100 0011>
1
87
ISD5100 Series I
2
C Operation Definitions
There are many control functions used to operate the ISD5100-Series. Among them are:
7.3.1.1. Read Status Command:
The Read Status command is a read request from the Host processor to the ISD5100 Series
without delivering a Command Byte. The Host supplies all the clocks (SCL). In each case, the
entity sending the data drives the data line (SDA). The Read Status Command is executed by the
following I
2
C sequence.
1. Host executes I
2
C START
2. Send Slave Address with R/W bit = “1” (Read) 81h
3. Slave (ISD5100-Series) responds back to Host an Acknowledge (ACK) followed by 8-bit
Status word
4. Host sends an Acknowledge (ACK) to Slave
5. Wait for SCL to go HIGH
6. Slave responds with Upper Address byte of internal address register
7. Host sends an ACK to Slave
8. Wait for SCL to go HIGH
9. Slave responds with Lower Address byte of internal address register (A[4:0] will always return
set to 0.)
10. Host sends a NO ACK to Slave, then executes I
2
C STOP
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