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參數(shù)資料
| 型號(hào)： | I5108S |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| 中文描述： | 480 SEC, SPEECH SYNTHESIZER WITH RCDG, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOIC-28 |
| 文件頁(yè)數(shù)： | 52/88頁(yè) |
| 文件大?。?/td> | 612K |
| 代理商： | I5108S |
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ISD5100 – SERIES
- 52 -
ANA IN (Analog Input)
The ANA IN pin is the analog input from the telephone chip set. It can be switched (by the I
2
C
interface) to the speaker output, the array input or to various other paths. This pin is designed to
accept a nominal 1.11 V p-p when at its minimum gain (6 dB) setting. There is additional gain
available, if required, in 3 dB steps, up to 15 dB. The gain settings are controlled from the
I
C
interface.
ANA IN Input Modes
ANA IN
Input
ANA IN Amplifier Gain Settings
CFG0
AIG1
AIG0
0
0
1
1
Setting
(1)
0TLP Input
V
P-P
(3)
Gain
(2)
Array
In/Out V
P-P
Speaker
Out V
P-P
(4)
6 dB
9 dB
12 dB
15 dB
1.110
0.785
0.555
0.393
0
1
0
1
0.625
0.883
1.250
1.767
0.694
0.694
0.694
0.694
2.22
2.22
2.22
2.22
1. Gain from ANA IN to SP+/-
2. Gain from ANA IN to ARRAY IN
3. 0TLP Input is the reference Transmission Level Point that is used for testing. This level is typically 3
dB below clipping
4. Speaker Out gain set to 1.6 (High). (Differential)
Gain
Setting
Resistor
Ration (Rb/Ra)
Gain
Gain
2
(dB)
00
63.9 / 102
0.625
-4.1
01
77.9 / 88.1
0.88
-1.1
10
92.3 / 73.8
1.25
1.9
11
106 / 60
1.77
4.9
Note: Ra & Rb are in k
ANA IN
Input Amplifier
NOTE:
f
CUTTOFF
2xR
a
C
CCUP
1
Ra
Rb
C
COUP =
0.1
ìF(xiàn)
Internal to the device
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