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參數(shù)資料
| 型號(hào)： | I5108S |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 音頻合成 |
| 英文描述： | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| 中文描述： | 480 SEC, SPEECH SYNTHESIZER WITH RCDG, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOIC-28 |
| 文件頁(yè)數(shù)： | 17/88頁(yè) |
| 文件大?。?/td> | 612K |
| 代理商： | I5108S |
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ISD5100 – SERIES
Publication Release Date: October, 2003
- 17 -
Revision 0.2
Register Bits
The register load may be used to modify a command
sequence (such as load an address) or used with the null
command sequence to load a configuration or test
register. Not all registers are accessible to the user. [RG2
is always 0 as the four additional combinations are
undefined.]
7.3.3. Opcode Summary
OpCode Command Description
The following commands are used to access the chip through the I
2
C interface.
Play: analog play command
Record: analog record command
Message Cue: analog message cue command
Read: digital read command
Write: digital write command
Erase: digital page and block erase command
Power up: global power up/down bit. (C7)
Load CFG0: load configuration register 0
Load CFG1: load configuration register 1
Read STATUS: Read the interrupt status and address register, including a hardwired device ID
RG2
RG1
RG0
C2
C1
C0
Function
0
0
0
No action
0
0
1
Reserved
0
1
0
Load CFG0
0
1
1
Load CFG1
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