參數(shù)資料
型號: HYS72D128500HR-7-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184-Pin Registered Double Data Rate SDRAM Module
中文描述: 184針注冊雙倍數(shù)據(jù)速率SDRAM模塊
文件頁數(shù): 10/45頁
文件大?。?/td> 1208K
代理商: HYS72D128500HR-7-B
Registered Double Data Rate SDRAM Module
Pin Configuration
10
Rev. 0.5, 2003-12
HYS72D[128/256][300/320/321/500][GBR/HR]-[5/6/7/7F]-B
Data Sheet
42
43
44
45
46
47
V
SS
A1
CB0
CB1
V
DD
DQS8
88
89
90
91
92
93
DQ59
V
SS
NC
SDA
SCL
V
SS
135
136
137
138
139
140
CB5
V
DDQ
CK0
CK0
V
SS
DQS17
181
182
183
184
SA0
SA1
SA2
V
DDSPD
1) A12 is used for 256Mbit and 512Mbit based modules only.
Table 5
Density
Address Format
Organization
Memory
Ranks
1
2
2
SDRAMs
# of
SDRAMs
18
18
36
# of row/bank/
column bits
13/2/12
13/2/11
13/2/12
Refresh
Period
Interval
1 GB
1 GB
2 GB
128M x 72
128M x 72
256M x 72
128M
×
4
64M
×
8
128M
×
4
8K
8K
8K
64 ms
64 ms
64 ms
7.8
μ
s
7.8
μ
s
7.8
μ
s
Table 4
PIN#
Pin Configuration
1)
(cont’d)
Symbol
PIN#
Symbol
PIN#
Symbol
PIN#
Symbol
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