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| 型號： | HYM4V33100DTYG-75 |
| 英文描述： | x32 SDRAM Module |
| 中文描述： | X32號，內(nèi)存模塊 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 73K |
| 代理商： | HYM4V33100DTYG-75 |
PC133 SDRAM AIMM
Rev. 0.1/Apr.01
6
HYM4V33100BTWG Series
DC CHARACTERISTICS I
(TA=0 to 70
°
C
, V
DD
=3.3
±
0.3V)
Note :
1.V
IN
= 0 to 3.6V, All other pins are not tested under V
IN
=0V
2.D
O U T
is disabled, V
O U T
=0 to 3.6
DC CHARACTERISTICS II
Note :
1. I
D D 1
and I
D D 4
depend on output loading and cycle rates. Specified values are measured with the output open
2. Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II
3.HYM4v33100BTWG-75
Parameter
Symbol
Min.
M a x
Unit
Note
Input Leakage Current
I
LI
-8
8
u A
1
Output Leakage Current
I
LO
-1
1
u A
2
Output High Voltage
V
O H
2.4
-
V
I
O H
= - 4 m A
Output Low Voltage
V
OL
-
0.4
V
I
OL
= + 4 m A
Parameter
Symbol
Test Condition
Speed
Unit
Note
-75
Operating Current
I
DD1
Burst length=1, One bank active
t
R C
≥
t
R C
(min), I
OL
= 0 m A
220
mA
1
Precharge Standby Current
in Power Down Mode
I
D D 2 P
C K E
≤
V
IL
(max), t
C K
= min
2
mA
I
D D 2 P S
C K E
≤
V
IL
(max), t
C K
=
∞
2
Precharge Standby Current
in Non Power Down Mode
I
D D 2 N
C K E
≥
V
IH
(min), C S
≥
V
IH
(min), t
CK
= min
Input signals are changed one time during
2clks. All other pins
≥
V
D D
-0.2V or
≤
0.2V
40
mA
I
D D 2 N S
C K E
≥
V
IH
(min), t
C K
=
∞
Input signals are stable.
30
Active Standby Current
in Power Down Mode
I
D D 3 P
C K E
≤
V
IL
(max), t
C K
= min
60
mA
I
D D 3 P S
C K E
≤
V
IL
(max), t
C K
=
∞
60
Active Standby Current
in Non Power Down Mode
I
D D 3 N
C K E
≥
V
IH
(min), C S
≥
V
IH
(min), t
CK
= min
Input signals are changed one time during
2clks. All other pins
≥
V
D D
-0.2V or
≤
0.2V
100
mA
I
D D 3 N S
C K E
≥
V
IH
(min), t
C K
=
∞
Input signals are stable.
60
Burst Mode Operating
Current
I
DD4
t
C K
≥
t
C K
(min), I
OL
= 0 m A
All banks active
C L = 3
220
mA
1
Auto Refresh Current
I
DD5
t
R R C
≥
t
RRC
(min), All banks active
220
mA
2
Self Refresh Current
I
DD6
C K E
≤
0.2V
4
mA
3
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