參數(shù)資料
型號(hào): HYB25D256400BC-7
英文描述: ?256Mb (64Mx4) FBGA DDR266A (2-3-3)?
中文描述: ?256Mb的(64Mx4)FBGA封裝DDR266A(2-3-3)?
文件頁(yè)數(shù): 15/76頁(yè)
文件大小: 1218K
代理商: HYB25D256400BC-7
2002-05-06
Page 15 of 76
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Commands
Deselect
The Deselect function prevents new commands from being executed by the DDR SDRAM. The DDR SDRAM
is effectively deselected. Operations already in progress are not affected.
No Operation (NOP)
The
N
o Operation (
N
OP) command is used to perform a
N
OP to a DDR SDRAM. This prevents unwanted
commands from being registered during idle or wait states. Operations already in progress are not affected.
Mode Register Set
The mode registers are loaded via inputs A0-A11, BA0 and BA1. See mode register descriptions in the Reg-
ister Definition section. The Mode Register Set command can only be issued when all banks are idle and no
bursts are in progress. A subsequent executable command cannot be issued until t
MRD
is met.
Active
The Active command is used to open (or activate) a row in a particular bank for a subsequent access. The
value on the BA0, BA1 inputs selects the bank, and the address provided on inputs A0-A11 selects the row.
This row remains active (or open) for accesses until a Precharge (or Read or
W
rite with Auto Precharge) is
issued to that bank. A Precharge (or Read or
W
rite with Auto Precharge) command must be issued and com-
pleted before opening a different row in the same bank.
Read
The Read command is used to initiate a burst read access to an active (open) row. The value on the BA0,
BA1 inputs selects the bank, and the address provided on inputs A0-Ai, A
j
(where
[
i = 8,
j
= don’t care
]
for
x16,
[
i =
9
,
j
= don’t care
]
for x8 and
[
i =
9
,
j
= 11
]
for x4) selects the starting column location. The value on
input A10 determines whether or not Auto Precharge is used. If Auto Precharge is selected, the row being
accessed is precharged at the end of the Read burst; if Auto Precharge is not selected, the row remains open
for subsequent accesses.
Write
The
W
rite command is used to initiate a burst write access to an active (open) row. The value on the BA0,
BA1 inputs selects the bank, and the address provided on inputs A0-Ai, A
j
(where
[
i =
9
,
j
= don’t care
]
for x8;
where
[
i =
9
,
j
= 11
]
for x4) selects the starting column location. The value on input A10 determines whether or
not Auto Precharge is used. If Auto Precharge is selected, the row being accessed is precharged at the end
of the
W
rite burst; if Auto Precharge is not selected, the row remains open for subsequent accesses. Input
data appearing on the DQs is written to the memory array sub
j
ect to the DM input logic level appearing coin-
cident with the data. If a given DM signal is registered low, the corresponding data is written to memory; if the
DM signal is registered high, the corresponding data inputs are ignored, and a
W
rite is not executed to that
byte/column location.
Precharge
The Precharge command is used to deactivate (close) the open row in a particular bank or the open row(s) in
all banks. The bank(s) will be available for a subsequent row access a specified time (t
RP
) after the Precharge
command is issued. Input A10 determines whether one or all banks are to be precharged, and in the case
where only one bank is to be precharged, inputs BA0, BA1 select the bank. Otherwise BA0, BA1 are treated
相關(guān)PDF資料
PDF描述
HYB25D256400BT-6 ?256Mbit (64Mx4) DDR333 (2.5-3-3)?
HYB25D256400BT-7 ?256Mbit (64Mx4) DDR266A (2-3-3)?
HYB25D256400BT-8 ?256Mbit (64Mx4) DDR200 (2-2-2)?
HYB25D256400T-7 DDR Synchronous DRAM
HYB25D256400T-7.5 DDR Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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HYB25D256400BCL-7 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256 Mbit Double Data Rate SDRAM