參數(shù)資料
型號: HYB25D128400AT-8
英文描述: ?128Mb (32Mx4) DDR200 (2-2-2)?
中文描述: ?128Mb的(32Mx4)DDR200(2-2-2)?
文件頁數(shù): 36/76頁
文件大?。?/td> 1218K
代理商: HYB25D128400AT-8
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Page 36 of 76
2002-05-06
Write to Read: Interrupting (CAS Latency = 2; Burst Length = 8)
T1
T2
T3
T4
T5
T6
t
DQSS
(max)
Maximum DQSS
N
OP
N
OP
N
OP
Read
W
rite
N
OP
DI a-b = data in for bank a, column b.
An interrupted burst is shown, 4 data elements are written.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
t
W
TR
is referenced from the first positive CK edge after the last data in pair.
The Read command masks the last 2 data elements in the burst.
A10 is Low with the
W
rite command (Auto Precharge is disabled).
The Read and
W
rite commands are not necessarily to the same bank.
1 = These bits are incorrectly written into the memory array if DM is low.
DIa- b
CK
CK
Command
Address
DQS
DQ
DM
Don’t Care
BAa, COL b
BAa, COL n
t
W
TR
CL = 2
T1
T2
T3
T4
T5
T6
Minimum DQSS
N
OP
N
OP
N
OP
Read
W
rite
N
OP
CK
CK
Command
Address
BAa, COL b
BAa, COL n
t
W
TR
DI a-b
DQS
DQ
DM
CL = 2
t
DQSS
(min)
1
1
1
1
相關(guān)PDF資料
PDF描述
HYB25D128800AT-7 ?128Mb (16mx8) DDR266A (2-3-3)?
HYB25D128800AT-8 ?128Mb (16Mx8) DDR200 (2-2-2)?
HYB25D128800T-7 ?128Mb (16Mx8) DDR 266A (2-3-3)?
HYB25D128800T-7.5 ?128Mb (16Mx8) DDR 266B (2.5-3-3)?
HYB25D256160BT-8 ?256Mbit (16Mx16) DDR200 (2-2-2)?
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