參數(shù)資料
型號: HY5DV281622DT-5
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 128M(8Mx16) GDDR SDRAM
中文描述: 8M X 16 DDR DRAM, 0.7 ns, PDSO66
封裝: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件頁數(shù): 30/31頁
文件大小: 294K
代理商: HY5DV281622DT-5
Rev. 0.5 / Aug. 2003
30
HY5DV281622DT
CAPACITANCE
(T
A
=25
o
C, f=1MHz )
Note :
1. V
DD
= min. to max., V
DDQ
= 2.3V to 2.7V, V
O
DC = V
DDQ
/2, V
O
peak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
Parameter
Pin
Symbol
Min
Max
Unit
Input Clock Capacitance
CK, CK
C
CK
2.0
3.0
pF
Input Capacitance
All other input-only pins
C
IN
2.0
3.0
pF
Input / Output Capacitanc
DQ, DQS, DM
C
IO
4.0
5.0
pF
V
REF
V
TT
R
T
=50
Zo=50
C
L
=30pF
Output
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