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參數(shù)資料
| 型號(hào)： | HY5DU281622AT-K |
| 英文描述： | SDRAM|DDR|4X2MX16|CMOS|TSSOP|66PIN|PLASTIC |
| 中文描述： | 內(nèi)存|復(fù)員| 4X2MX16 |的CMOS | TSSOP封裝| 66PIN |塑料 |
| 文件頁數(shù)： | 14/37頁 |
| 文件大?。?/td> | 336K |
| 代理商： | HY5DU281622AT-K |
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Rev. 0.3 / Dec. 01
14
HY5DU12422T
HY5DU12822T
HY5DU121622T
OPERATION COMMAND TRUTH TABLE-IV
Note :
1. H - Logic High Level, L - Logic Low Level, X - Don’t Care, V - Valid Data Input,
BA - Bank Address, AP - AutoPrecharge Address, CA - Column Address, RA - Row Address, NOP - NO Operation.
2. All entries assume that CKE was active(high level) during the preceding clock cycle.
3. If both banks are idle and CKE is inactive(low level), then in power down mode.
4. Illegal to bank in specified state. Function may be legal in the bank indicated by Bank Address(BA) depending on the state of
that bank.
5. If both banks are idle and CKE is inactive(low level), then self refresh mode.
6. Illegal if tRCD is not met.
7. Illegal if tRAS is not met.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Illegal if tRRD is not met.
10. Illegal for single bank, but legal for other banks in multi-bank devices.
11. Illegal for all banks.
Current
State
/ CS
/ RAS
/ CAS
/ WE
Address
Command
Action
WRITE
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
11
L
L
H
H
BA, RA
ACT
ILLEGAL
11
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
11
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
MODE
REGISTER
ACCESSING
H
X
X
X
X
DSEL
NOP - Enter IDLE after tMRD
L
H
H
H
X
NOP
NOP - Enter IDLE after tMRD
L
H
H
L
X
BST
ILLEGAL
11
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
11
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
11
L
L
H
H
BA, RA
ACT
ILLEGAL
11
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
11
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY5DU281622AT-L | DDR Synchronous DRAM |
| HY5DU281622DLT | 8Mx16|2.5V|4K|J/M/K/H/L|DDR SDRAM - 128M |
| HY5DU281622DT | 8Mx16|2.5V|4K|J/M/K/H/L|DDR SDRAM - 128M |
| HY5DU281622DT-6 | 8Mx16|2.5V|4K|6|DDR SDRAM - 128M |
| HY5DU281622T | 8Mx16|2.5V|4K|H/L|DDR SDRAM - 128M |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY5DU281622AT-L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DDR Synchronous DRAM |
| HY5DU281622DLT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx16|2.5V|4K|J/M/K/H/L|DDR SDRAM - 128M |
| HY5DU281622DLT-X | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb-S DDR SDRAM |
| HY5DU281622DT | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:128Mb-S DDR SDRAM |
| HY5DU281622DT-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx16|2.5V|4K|6|DDR SDRAM - 128M |
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