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參數(shù)資料
| 型號： | HV300 |
| 廠商： | Supertex, Inc. |
| 元件分類： | 脈沖抑制器 |
| 英文描述： | Hotswap, Inrush Current Limiter Controllers |
| 中文描述： | 熱插拔，浪涌電流限制器控制器 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 78K |
| 代理商： | HV300 |
HV300/HV310
4
Pinout
Pin Description
PWRGD –
The Power Good Output Pin is held inactive on initial
power application and will go active when the external MOSFET
is fully turned on. This pin may be used as an enable control
when connected directly to a PWM power module.
OV –
This Over Voltage sense pin, when raised above its high
threshold will immediately cause the GATE pin to be pulled low.
The GATE pin will remain low until the voltage on this pin falls
below the low threshold limit, initiating a new start-up cycle.
UV
– This Under Voltage sense pin, when below its low threshold
limit will ensure that the GATE pin is low. The GATE pin will
remain low until the voltage on this pin rises above the high
threshold, initializing a new start-up cycle.
V
EE
– This pin is the negative voltage power supply input to the
circuit.
V
DD
–
This pin is the positive voltage power supply input to the
circuit.
RAMP –
This pin provides a current output so that a timing
ramp voltage is generated when a capacitor is connected. The
initial portion of the ramp provides a time delay, which in
conjunction with the Under Voltage detection circuit eliminates
circuit card insertion contact bounce. The RAMP pin also controls
the delay between the current limit mode disengaging and the
PWRGD signal activating; as well as the current rise profile
after the initial turn on delay.
GATE –
This is the Gate Driver Output for the external N-
Channel MOSFET.
SENSE –
The current sense resistor connected from this pin to
V
EE
pin programs the current limit. Constant current output
mode is established when the voltage drop across this resistor
reaches 50mV.
Functional Block Diagram
1
2
3
4
8
7
6
5
PWRGD
V
DD
RAMP
OV
UV
GATE
V
EE
SENSE
PWRGD Logic
Model
Condition
PWRGD
HV300
NOT READY
0
V
EE
HI Z
READY
1
HV310
NOT READY
1
HI Z
READY
0
V
EE
Buffer
LOGIC
V
INT
V
DD
UV
OV
V
EE
SENSE
GATE
RAMP
Vref
UVLO
and
POR
Band Gap
Reference
Internal
Supply
Regulator
VINT
V
INT –1.2V
Vref
HV300:PWRG
HV310: PWRGD
+
–
10μA
Trans-
conductor
V
REF
5k
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PDF描述 |
|---|---|
| HV300DB1 | HV300 Hot Swap Demo Board |
| HV300LG | Hotswap, Inrush Current Limiter Controllers |
| HV310 | Hotswap, Inrush Current Limiter Controllers |
| HV310LG | Hotswap, Inrush Current Limiter Controllers |
| HV301 | Hotswap, Controllers with Circuit Breaker |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HV-300 | 制造商:KSS 功能描述:Pack |
| HV300001 | 制造商:DIGIMESS 功能描述:PSU BENCH HIGH VOLTAGE 制造商:DIGIMESS 功能描述:PSU, BENCH, HIGH VOLTAGE |
| HV-3000XG-W1 | 制造商:Black Box Corporation 功能描述:1 year warranty for HV-3000XG |
| HV-3000XG-W3 | 制造商:Black Box Corporation 功能描述:3 year warranty for HV-3000XG |
| HV300DB1 | 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:HV300 Hot Swap Demo Board |
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