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參數(shù)資料
| 型號： | HT82M9BEE |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | USB Mouse Encoder 8-Bit MCU with EEPROM |
| 中文描述： | USB鼠標(biāo)編碼器8位微控制器帶有EEPROM |
| 文件頁數(shù)： | 18/47頁 |
| 文件大?。?/td> | 336K |
| 代理商： | HT82M9BEE |
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HT82M9BEE/HT82M9BAE
Rev. 1.20
18
August 13, 2007
Data EEPROM Functional Description
Serial clock (SCL)
The SCLinput is used for positive edge clock data into
each EEPROM device and negative edge clock data
out of each device.
Serial data (SDA)
The SDA pin is bidirectional for serial data transfer.
The pin is open-drain driven and may be wired-OR
with any number of other open-drain or open collector
devices.
Memory Organization
1K Serial EEPROM
Internally organized with 128 8-bit words, the 1K re-
quiresan8-bitdatawordaddressforrandomwordad-
dressing.
Device Operations
Clock and data transition
Data transfer may be initiated only when the bus is not
busy. During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
data line while the clock line is high will be interpreted
as a START or STOP condition.
Start condition
Ahigh-to-low transition of SDAwith SCLhigh is a start
condition which must precede any other command
(refer to Start and Stop Definition Timing diagram).
Stop condition
Alow-to-high transition of SDAwith SCLhigh is a stop
condition. After a read sequence, the stop command
will place the EEPROM in a standby power mode (re-
fer to Start and Stop Definition Timing Diagram).
Acknowledge
All addresses and data words are serially transmitted
to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has re-
ceived each word. This happens during the ninth
clock cycle.
Device Addressing
The 1K EEPROM devices all require an 8-bit device ad-
dress word following a start condition to enable the chip
for a read or write operation. The device address word
consist of a mandatory one, zero sequence for the first
four most significant bits (refer to the diagram showing
the Device Address). This is common to all the
EEPROM device.
The next three bits are the fixed to be 0 .
The 8th bit of device address is the read/write operation
select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
If the comparison of the device address succeed the
EEPROM will output a zero at ACK bit. If not, the chip will
return to a standby state.
Write Operations
Byte write
A write operation requires an 8-bit data word address
following the device address word and acknowledg-
ment. Upon receipt of this address, the EEPROM will
again respond with a zero and then clock in the first
8-bit data word. After receiving the 8-bit data word, the
EEPROM will output a zero and the addressing de-
vice, such as a microcontroller, must terminate the
write sequence with a stop condition. At this time the
EEPROM enters an internally-timed write cycle to the
non-volatile memory. All inputs are disabled during
this write cycle and EEPROM will not respond until the
write is completed (refer to Byte write timing).
Acknowledge polling
Tomaximisebusthroughput,onetechniqueistoallow
the master to poll for an acknowledge signal after the
start condition and the control byte for a write com-
mand have been sent. If the device is still busy imple-
menting its write cycle, then no ACK will be returned.
The master can send the next read/write command
when the ACK signal has finally been received.
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1
1
1
1
A
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Byte Write Timing
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