HT82M99EE/HT82M99AE
Rev. 1.00
24
February 8, 2006
The device with remote wake-up function can wake-up
the USB Host by sending a wake-up pulse through
RMWK (bit 1 of USC). Once the USB Host receive the
wake-up signal from the HT8M99E, it will send a Re-
sume signal to the device. The timing is as follows:
To Configure the HT8M99E as PS2 Device
The HT8M99E can be defined as a USB interface or a
PS2 interface by configuring the SPS2 (bit 4 of the USR)
and SUSB (bit 5 of the USR). If SPS2=1, and SUSB=0,
the HT8M99E is defined as PS2 interface, pin USBD- is
now defined as PS2 Data pin and USBD+ is now de-
fined as PS2 Clk pin. The user can easily read or write to
the PS2 Data or PS2 Clk pin by accessing the corre-
sponding bit PS2DAI (bit 4 of the USC), PS2CKI (bit 5 of
the USC), PS2DAO (bit 6 of the USC) and S2CKO (bit 7
of the USC) respectively.
The user should make sure that in order to read the data
properly, the corresponding output bit must be set to 1 .
For example, if user wants to read the PS2 Data by
reading PS2DAI, the PS2DAO should be set to 1 . Oth-
erwise it always read a 0 .
If SPS2=0, and SUSB=1, the HT8M99E is defined as a
USB interface. Both the USBD- and USBD+ are driven
by the USB SIE of the HT8M99E. User only writes or
reads the USB data through the corresponding FIFO.
Both SPS2 and SUSB default is 0 .
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I/O Port Special Registers Definition
Port-A (12H)
PA
Bit No.
Label
Read/Write
Option
Functions
0
PA0
R/W
I/O (R/W) has pull-low and pull-high ROM code option.
Has falling edge wake-up ROM code option.
1
PA1
R/W
I/O (R/W) has pull-low and pull-high option.
Has falling edge wake-up option.
2~3
PA2~PA3
R/W
I/O (R/W) has pull-low and pull-high option.
Has falling edge and rising edge wake-up option.
4~6
PA4~PA6
R/W
I/O (R/W) has pull-high option.
Has falling edge wake-up option.
7
PA7
R/W
I/O (R/W) has pull-high option.
Has falling edge wake-up option, pin-shared with timer input pin.
PA (12H) Register
Port-A Control (13H)
This port configure the input or output mode of Port-A
PAC
Port-B Control (14H)
PB
Bit No.
Label
Read/Write
Option
Functions
0~1,
5~6
PB0~PB1,
PB5~PB6
Reserved bit.
2~3
PB2~PB3
R/W
I/O (R/W), has pull-low and pull-high option, ADC input.
4
PB4
R/W
I/O (R/W), has pull-high option, can wake-up, ADC input.
7
PB7
R/W
I/O (R/W), has pull-high option, ADC input, VRH input for ADC ex-
ternal mode, has wake-up capability.
PB (14H) Register
Port-B Control (15H)
This port configures the input or output mode of Port-B for I/O mode
PBC