參數(shù)資料
型號(hào): HT82K68A
廠商: Holtek Semiconductor Inc.
英文描述: 8-Bit High Performance Peripheral Interface IC For Multiple I/O Products and Multimedia Applications(8位高性能外圍接口集成芯片,用于多I/O口及多媒體器件)
中文描述: 8位高性能外圍接口芯片為多個(gè)I / O產(chǎn)品和多媒體應(yīng)用(8位高性能外圍接口集成芯片,用于多的I / O口及多媒體器件)
文件頁數(shù): 16/40頁
文件大?。?/td> 255K
代理商: HT82K68A
HT82K68A
16
December 8, 2000
Label
Bits
Function
0~3
Unused bits, read as "0"
TON
4
To enable/disable timer counting
(0= disabled; 1= enabled)
5
Unused bits, read as "0"
TM0
TM1
6
7
10= Timer mode (internal clock)
TMRC register
To enable the counting operation, the timer
ON bit (TON; bit 4 of TMRC) should be set to 1.
In the case of timer counter OFF condition,
writing data to the timer counter preload reg-
ister will also reload that data to the timer
counter. But if the timer counter is turned on,
data written to it will only be kept in the
timer counter preload register. The timer coun-
ter will still operate until overflow occurs. When
the timer counter (reading TMR) is read, the
clock will be blocked to avoid errors. As clock
blocking may results in a counting error, this
mustbetakenintoconsiderationbytheprogram-
mer.
Input/output ports
There are 32 bidirectional input/output lines in
the HT82K68A, labeled from PA to PE, which
are mapped to the data memory of [12H], [14H],
[16H], [18H] and [1AH] respectively. All these
I/Oportscanbeusedforinputandoutputopera-
tions. For input operation, these ports are
non-latching, that is, the inputs must be ready
at the T2 rising edge of instruction MOV A,[m]
(m=12H, 14H, 16H, 18H or 1AH). For output op-
eration, all data is latched and remains un-
changed until the output latch is rewritten.
" & . < + ,
.& - $
&
&
. &
& 1
.
> % . @
&
Timer counter
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