參數(shù)資料
型號(hào)： HT82J97E-28SOP-A
廠商： Holtek Semiconductor Inc.
英文描述： USB Joystick Encoder 8-Bit OTP MCU
中文描述： USB搖桿編碼器8位微控制器檢察官辦公室
文件頁(yè)數(shù)： 17/46頁(yè)
文件大?。?/td> 314K
代理商： HT82J97E-28SOP-A
HT82J97E
Rev. 1.30
17
May 10, 2004
Function
Name
Read/Write
Description
Adr_set
R/W
This bit is used to configure the USB SIE to automatically change the device address with
the value of the Address+Remote_WakeUp Register (42H).
When this bit is set to 1 by F/W, the USB SIE will update the device address with the value
of the Address+Remote_WakeUp Register (42H) after the PC Host has successfully read
the data from the device by the IN operation. The USB SIE will clear the bit after updating
the device address.
Otherwise, when this bit is cleared to 0, the USB SIE will update the device address imme-
diately after an address is written to the Address+Remote_WakeUp Register (42H).
F0_Err
R/W
This bit is used to indicate when there are some errors that occurred when the FIFO0 is
accessed.
This bit is set by the USB SIE and cleared by F/W.
Out
R/W
This bit is used to indicate that there are OUT token (except for the OUT zero) that has
been received. The F/W clears the bit after the OUT data has been read. Also, this bit will
be cleared by the USB SIE after the next valid SETUP token is received.
IN
R
This bit is used to indicate that the current USB receiving signal from the PC Host is IN to-
ken.
NAK
R
This bit is used to indicate that the USB SIE has transmitted the NAK signal to the Host in
response to the PC Host IN or OUT token.
CRC_err
R/W
This bit indicates that there are CRC error (bit=1). The programmer must do something to
save the device and keep it alive.
This bit is set by the USB SIE and cleared by F/W.
EOT
R
End of transient flag, normal status is 1. If suspend= 1 line & EOT= 0 indicates that
something is wrong in the USB Interface. The programmer must do something to save the
device and keep it alive.
MNI
R/W
This bit is for masking the NAK interrupt when MNI= 1 , the default value= 0
SIES Function Table
The Misc register is actually a command + status to control the desired FIFO action and to show the status of the de-
sired FIFO. Every bit s meaning and usage are listed as follows:
Bit No.
Function
Read/Write
Register Address
7
Len0
R/W
01000110B
6
Ready
R
5
Set CMD
R/W
4
Sel_pipe1
R/W
3
Sel_pipe0
R/W
2
Clear
R/W
1
Tx
R/W
0
Request
R/W
Misc Registers Table
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