參數(shù)資料
型號: HT48C05
廠商: Holtek Semiconductor Inc.
英文描述: Cost-Effective I/O Type 8-Bit MCU
中文描述: 成本效益的I / O型8位微控制器
文件頁數(shù): 22/38頁
文件大?。?/td> 264K
代理商: HT48C05
CLR [m].i
Clear bit of data memory
Description
The bit i of the specified data memory is cleared to 0.
Operation
[m].i
0
Affected flag(s)
TO
PDF
OV
Z
AC
C
CLR WDT
Clear Watchdog Timer
Description
The WDTis cleared (clears the WDT). The power down bit (PDF) and time-out bit (TO) are
cleared.
Operation
WDT
00H
PDF and TO
0
Affected flag(s)
TO
PDF
OV
Z
AC
C
0
0
CLR WDT1
Preclear Watchdog Timer
Description
Together with CLR WDT2, clears the WDT. PDF and TO are also cleared. Only execution
ofthisinstructionwithouttheotherpreclearinstructionjustsetstheindicatedflagwhichim-
plies this instruction has been executed and the TO and PDF flags remain unchanged.
Operation
WDT
00H*
PDF and TO
0*
Affected flag(s)
TO
PDF
OV
Z
AC
C
0*
0*
CLR WDT2
Preclear Watchdog Timer
Description
Together with CLR WDT1, clears the WDT. PDF and TO are also cleared. Only execution
of this instruction without the other preclear instruction, sets the indicated flag which im-
plies this instruction has been executed and the TO and PDF flags remain unchanged.
Operation
WDT
00H*
PDF and TO
0*
Affected flag(s)
TO
PDF
OV
Z
AC
C
0*
0*
CPL [m]
Complement data memory
Description
Each bit of the specified data memory is logically complemented (1 s complement). Bits
which previously contained a 1 are changed to 0 and vice-versa.
Operation
[m]
[m]
Affected flag(s)
TO
PDF
OV
Z
AC
C
HT48R05A-1/HT48C05/HT48R06A-1/HT48C06
Rev. 1.10
22
June 9, 2004
相關(guān)PDF資料
PDF描述
HT48C06 Cost-Effective I/O Type 8-Bit MCU
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HT48C50-1 8-Bit High Performance RISC-like Microcontroller Suitable for Multiple I/O Application(高性能、指令類似RISC的8位微控制器,用于多I/O接口設備)
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